P

Inventor

HAMMOND GARY

US22 patents
⚠️ This page may combine multiple inventors who share the name “HAMMOND GARY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

17 patents
US6065105AMay 16, 2000

Dependency matrix

INTEL CORP169 citations98
US6016540AJan 18, 2000

Method and apparatus for scheduling instructions in waves

INTEL CORP136 citations98
US6408386B1Jun 18, 2002

Method and apparatus for providing event handling functionality in a computer system

INTEL CORP90 citations97
US5774686AJun 30, 1998

Method and apparatus for providing two system architectures in a processor

INTEL CORP104 citations97
US5740413AApr 14, 1998

Method and apparatus for providing address breakpoints, branch breakpoints, and single stepping

INTEL CORP120 citations97
US5621886AApr 15, 1997

Method and apparatus for providing efficient software debugging

INTEL CORP116 citations97
US6397301B1May 28, 2002

Preventing access to secure area of a cache

INTEL CORP68 citations95
US6219774B1Apr 17, 2001

Address translation with/bypassing intermediate segmentation translation to accommodate two different instruction set architecture

INTEL CORP48 citations95
US6542981B1Apr 1, 2003

Microcode upgrade and special function support by executing RISC instruction to invoke resident microcode

INTEL CORP57 citations94
US7263567B1Aug 28, 2007

Method and apparatus for lowering the die temperature of a microprocessor and maintaining the temperature below the die burn out

INTEL CORP43 citations87
US6560689B1May 6, 2003

TLB using region ID prevalidation

INTEL CORP19 citations84
US7383374B2Jun 3, 2008

Method and apparatus for managing virtual addresses

INTEL CORP14 citations81
US5978900ANov 2, 1999

Renaming numeric and segment registers using common general register pool

INTEL CORP18 citations81
US6584558B2Jun 24, 2003

Article for providing event handling functionality in a processor supporting different instruction sets

INTEL CORP10 citations73
US6625693B2Sep 23, 2003

Fast exception processing

INTEL CORP10 citations72
US6049864AApr 11, 2000

Method for scheduling a flag generating instruction and a subsequent instruction by executing the flag generating instruction in a microprocessor

INTEL CORP10 citations68
US7395415B2Jul 1, 2008

Method and apparatus to provide a source operand for an instruction in a processor

INTEL CORP0 citations50

HAMMOND GARY

4 patents

TECH LINK INTERNATIONAL ENTERT

1 patent