Inventor

MAYUZUMI SATORU

US24 patents

⚠️ This page may combine multiple inventors who share the name “MAYUZUMI SATORU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MAYUZUMI SATORU

SONY CORP

Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions

Method for fabricating a metal high-k gate stack for a buried recessed access device

Semiconductor memory system with bit line and method of manufacture thereof

Method for fabricating a metal high-k gate stack for a buried recessed access device

Method for fabricating a metal high-k gate stack for a buried recessed access device

Semiconductor device and manufacturing method thereof

Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions

Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions

Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions

Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions

Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions

SANDISK TECHNOLOGIES LLC

Three-dimensional memory device with horizontal silicon channels and method of making the same

Air gap three-dimensional cross rail memory device and method of making thereof

Three-dimensional memory device containing cobalt capped copper lines and method of making the same

NEC ELECTRONICS CORP

Method for fabricating a MOSFET

Semiconductor device and method of fabricating the same

MAYUZUMI SATORU

Semiconductor device including source/drain regions and a gate electrode, and having contact portions

Semiconductor device having a stress-inducing layer between channel region and source and drain regions

MICRON TECHNOLOGY INC

Transistors having strained channel under gate in a recess

Transistors having strained channel under gate in a recess

NEC CORP

Semiconductor device interconnection structure

SONY GROUP CORP

Semiconductor device including stress application layer

SONY SEMICONDUCTOR SOLUTIONS CORP

Method for fabricating a metal high-k gate stack for a buried recessed access device

SANDISK TECHNOLOGIES INC

Unselect word line switch bias scheme for non-volatile memory apparatus