Inventor

CORDES ROBERT A

US21 patents

⚠️ This page may combine multiple inventors who share the name “CORDES ROBERT A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CORDES ROBERT A

IBM

Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions

Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions

Operation of a multi-slice processor implementing simultaneous two-target loads and stores

Operation of a multi-slice processor implementing simultaneous two-target loads and stores

Handling unaligned load operations in a multi-slice computer processor

Handling unaligned load operations in a multi-slice computer processor

Out-of-order processor that avoids deadlock in processing queues by designating a most favored instruction

Handling unaligned load operations in a multi-slice computer processor

Area and power efficient mechanism to wakeup store-dependent loads according to store drain merges

Handling unaligned load operations in a multi-slice computer processor

Dynamic translation lookaside buffer (TLB) invalidation using virtually tagged cache for load/store operations

Handling unaligned load operations in a multi-slice computer processor

Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions

Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions

Writing store data of multiple store operations into a cache line in a single cycle

Handling oversize store to load forwarding in a processor

Out-of-order processor that avoids deadlock in processing queues by designating a most favored instruction

Handling unaligned load operations in a multi-slice computer processor

Extended store forwarding for store misses without cache allocate

Preventing hazard flushes in an instruction sequencing unit of a multi-slice processor

ISLAM SAIFUL

Dependency matrix with reduced area and power consumption