P

Inventor

HUANG HONG-YI

TW38 patents
⚠️ This page may combine multiple inventors who share the name “HUANG HONG-YI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IND TECH RES INST

26 patents
US6331791B1Dec 18, 2001

Charge-redistribution low-swing differential logic circuit

IND TECH RES INST136 citations98
US6285578B1Sep 4, 2001

Hidden refresh pseudo SRAM and hidden refresh method

IND TECH RES INST85 citations98
US5841298ANov 24, 1998

Locally asynchronous, pipeline-able logic circuits for true-single-phase synchronous logic circuit

IND TECH RES INST112 citations98
US6154409ANov 28, 2000

Self row-identified hidden refresh circuit and refresh method thereof

IND TECH RES INST24 citations93
US7528640B2May 5, 2009

Digital pulse-width control apparatus

IND TECH RES INST22 citations91
US6456120B1Sep 24, 2002

Capacitor-coupling differential logic circuit

IND TECH RES INST16 citations84
US8369476B2Feb 5, 2013

Clock generator and delta-sigma modulater thereof

IND TECH RES INST7 citations83
US6850089B2Feb 1, 2005

Apparatus for capacitor-coupling acceleration

IND TECH RES INST15 citations83
US7791385B2Sep 7, 2010

Spread spectrum clock generating apparatus

IND TECH RES INST13 citations81
US8023363B2Sep 20, 2011

Time-to-digital converter apparatus

IND TECH RES INST9 citations79
US7522084B2Apr 21, 2009

Cycle time to digital converter

IND TECH RES INST14 citations79
US7292079B2Nov 6, 2007

DLL-based programmable clock generator using a threshold-trigger delay element circuit and a circular edge combiner

IND TECH RES INST12 citations79
US6838909B2Jan 4, 2005

Bulk input differential logic circuit

IND TECH RES INST15 citations77
US6999518B1Feb 14, 2006

Receiver and transmission in a transmission system

IND TECH RES INST8 citations74
US5815006ASep 29, 1998

Single transition per evaluation phase latch circuit for pipelined true-single-phase synchronous logic circuit

IND TECH RES INST7 citations74
US7924965B2Apr 12, 2011

Clock generator, multimodulus frequency divider and deta-sigma modulater thereof

IND TECH RES INST6 citations73
US7466177B2Dec 16, 2008

Pulse-width control loop for clock with pulse-width ratio within wide range

IND TECH RES INST8 citations73
US7859343B2Dec 28, 2010

High-resolution varactors, single-edge triggered digitally controlled oscillators, and all-digital phase-locked loops using the same

IND TECH RES INST4 citations62
US7525355B2Apr 28, 2009

Digital delay locked loop

IND TECH RES INST2 citations61
US8026709B2Sep 27, 2011

Voltage generating apparatus

IND TECH RES INST3 citations59
US7605613B2Oct 20, 2009

Bulk input current switch logic circuit

IND TECH RES INST4 citations59
US7576599B2Aug 18, 2009

Voltage generating apparatus

IND TECH RES INST2 citations59
US7342419B2Mar 11, 2008

Bidirectional current-mode transceiver

IND TECH RES INST5 citations59
US7446585B2Nov 4, 2008

Programmable delay circuit

IND TECH RES INST1 citations51
US7605614B2Oct 20, 2009

Bulk input current switch logic circuit

IND TECH RES INST1 citations48
US7551000B2Jun 23, 2009

Differential bidirectional transceiver and receiver therein

IND TECH RES INST1 citations48

QUANTA COMP INC

6 patents

HUANG HONG-YI

3 patents

UNIV NAT CHIAO TUNG

1 patent

PERICOM TECHNOLOGY SHANGHAI CO

1 patent

HSU CHIEN-SHIH

1 patent