Inventor

SHENG YI-CHUNG

TW49 patents

⚠️ This page may combine multiple inventors who share the name “SHENG YI-CHUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHENG YI-CHUNG

UNITED MICROELECTRONICS CORP

Method for manufacturing shallow trench isolation

High electron mobility transistor (HEMT) and forming method thereof

Multilayer ONO structure

Semiconductor MOS transistor device and method for making the same

Method of manufacture of multi-state mask ROM and multi-state mask ROM device produced thereby

Multi-state read-only memory using multiple polysilicon selective depositions

Process for fabricating high-density mask ROM devices

Method for fabricating single diffusion break structure directly under a gate line

Method of fabricating high density flat cell mask ROM

Method of forming a CMOS transistor

Method of fabricating a word line

Process for making identification alphanumeric code markings for mask ROM devices

CVD oxide coding method for ultra-high density mask read-only-memory (ROM)

Method for fabricating read-only-memory devices with self-aligned code implants

Method of forming fin forced stack inverter

Method of fabricating tetra-state mask read only memory

Silicide process for manufacturing a mask ROM

Method of fabricating flat-cell mask read-only memory (ROM) devices

High electron mobility transistor (HEMT) and forming method thereof

Magnetoresistive random access memory

Semiconductor device and method of forming the same

Semiconductor MOS transistor device and method for making the same

Method for fabricating a tri-state read-only memory device

Post-titanium nitride mask ROM programming method and device manufactured thereby

High electron mobility transistor (HEMT) and forming method thereof

Method of fabricating semiconductor device for preventing polysilicon line being damaged during removal of photoresist

Magnetoresistive random access memory

Magnetoresistive random access memory

Magnetoresistive random access memory

Test key structure and method of measuring resistance of vias

Mark pattern in semiconductor device

Method of fabricating memory cells with buried bit lines

1-1 fin forced stack inverter

Semiconductor MOS transistor device and method for making the same

Method of fabricating strained-silicon transistors

Tri-state read-only memory device and method for fabricating the same

Method for removing a diffusion barrier layer on pad regions

Method for fabricating a storage electrode without polysilicon bridge and undercut

Magnetoresistive random access memory wherein number of memory cells in each string is equal to number of strings connected in parallel

Semiconductor device and method for fabricating the same

Method of manufacturing semiconductor circuit structure

Method for inspecting photoresist pattern

Intra-metal capacitor and method of forming the same

Intra-metal capacitor and method of forming the same

Semiconductor device

CHEN CHUN-CHIA

Method of manufacturing complementary metal oxide semiconductor device

LIN HUANG-YI

Method for fabricating a semiconductor device

CHANG CHU-CHUN

Semiconductor device having metal gate and manufacturing method thereof

SUN CHIA-CHEN

Semiconductor circuit structure