P

Inventor

PATIL SURAJ K

US18 patents
⚠️ This page may combine multiple inventors who share the name “PATIL SURAJ K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GLOBALFOUNDRIES INC

15 patents
US9698241B1Jul 4, 2017

Integrated circuits with replacement metal gates and methods for fabricating the same

GLOBALFOUNDRIES INC28 citations94
US10236358B1Mar 19, 2019

Integration of gate structures and spacers with air gaps

GLOBALFOUNDRIES INC7 citations84
US9396995B1Jul 19, 2016

MOL contact metallization scheme for improved yield and device reliability

GLOBALFOUNDRIES INC15 citations83
US9613855B1Apr 4, 2017

Methods of forming MIS contact structures on transistor devices in CMOS applications

GLOBALFOUNDRIES INC7 citations82
US10043708B2Aug 7, 2018

Structure and method for capping cobalt contacts

GLOBALFOUNDRIES INC4 citations71
US10056331B2Aug 21, 2018

Programmable via devices with metal/semiconductor via links and fabrication methods thereof

GLOBALFOUNDRIES INC1 citations52
US9812393B2Nov 7, 2017

Programmable via devices with metal/semiconductor via links and fabrication methods thereof

GLOBALFOUNDRIES INC0 citations52
US9754903B2Sep 5, 2017

Semiconductor structure with anti-efuse device

GLOBALFOUNDRIES INC1 citations52
US9691497B2Jun 27, 2017

Programmable devices with current-facilitated migration and fabrication methods

GLOBALFOUNDRIES INC0 citations52
US9564447B1Feb 7, 2017

Methods for fabricating programmable devices and related structures

GLOBALFOUNDRIES INC1 citations52
US9502301B2Nov 22, 2016

Fabrication methods for multi-layer semiconductor structures

GLOBALFOUNDRIES INC0 citations52
US9195132B2Nov 24, 2015

Mask structures and methods of manufacturing

GLOBALFOUNDRIES INC1 citations47
US9620381B2Apr 11, 2017

Facilitating etch processing of a thin film via partial implantation thereof

GLOBALFOUNDRIES INC0 citations41
US9570572B2Feb 14, 2017

Multiple layer interface formation for semiconductor structure

GLOBALFOUNDRIES INC0 citations41
US9831123B2Nov 28, 2017

Methods of forming MIS contact structures on transistor devices

GLOBALFOUNDRIES INC0 citations40

CELIK-BUTLER ZEYNEP

1 patent

SAMSUNG ELECTRONICS CO LTD

1 patent

UNIV TEXAS

1 patent