P

Inventor

GULIANI SANDEEP K

US26 patents

Patents

26 patents
US6223290B1Apr 24, 2001

Method and apparatus for preventing the fraudulent use of a cellular telephone

INTEL CORP166 citations98
US5109187AApr 28, 1992

CMOS voltage reference

INTEL CORP70 citations96
US6629047B1Sep 30, 2003

Method and apparatus for flash voltage detection and lockout

INTEL CORP29 citations92
US6463004B2Oct 8, 2002

VPX bank architecture

INTEL CORP18 citations92
US6163225ADec 19, 2000

Method and apparatus for achieving low standby power using a positive temperature correlated clock frequency

INTEL CORP30 citations92
US6255896B1Jul 3, 2001

Method and apparatus for rapid initialization of charge pump circuits

INTEL CORP54 citations91
US9685204B2Jun 20, 2017

Cross-point memory single-selection write technique

INTEL CORP5 citations84
US9601193B1Mar 21, 2017

Cross point memory control

INTEL CORP12 citations84
US9384831B2Jul 5, 2016

Cross-point memory single-selection write technique

INTEL CORP8 citations84
US6789027B2Sep 7, 2004

Method and apparatus for flash voltage detection and lockout

INTEL CORP12 citations74
US6434073B2Aug 13, 2002

VPX bank architecture

INTEL CORP7 citations74
US6150835ANov 21, 2000

Method and apparatus for fast production programming and low-voltage in-system writes for programmable logic device

INTEL CORP7 citations74
US5373508ADec 13, 1994

Detecting valid data from a twisted pair medium

INTEL CORP14 citations74
US10056136B2Aug 21, 2018

Cross-point memory single-selection write technique

INTEL CORP3 citations73
US9792986B2Oct 17, 2017

Phase change memory current

INTEL CORP4 citations73
US9543005B2Jan 10, 2017

Multistage memory cell read

INTEL CORP3 citations73
US6459645B2Oct 1, 2002

VPX bank architecture

INTEL CORP3 citations63
US12237040B2Feb 25, 2025

Method and apparatus to perform a read of a column in a memory accessible by row and/or by column

INTEL CORP0 citations62
US9224465B2Dec 29, 2015

Cross-point memory bias scheme

INTEL CORP3 citations62
US6072723AJun 6, 2000

Method and apparatus for providing redundancy in non-volatile memory devices

INTEL CORP6 citations61
US11114143B2Sep 7, 2021

Bipolar decoder for crosspoint memory cells

INTEL CORP0 citations59
US10546634B2Jan 28, 2020

Cross point memory control

INTEL CORP0 citations52
US10497434B2Dec 3, 2019

Cross-point memory single-selection write technique

INTEL CORP0 citations52
US10134468B2Nov 20, 2018

Cross point memory control

INTEL CORP0 citations52
US12597463B2Apr 7, 2026

Techniques to map and access column read enabled memory

INTEL CORP0 citations51
US9715930B2Jul 25, 2017

Reset current delivery in non-volatile random access memory

INTEL CORP0 citations31