Inventor
MELLEMPUDI NAVEEN
IN25 patents
Patents
25 patentsUS12020028B2Jun 25, 2024
Apparatuses, methods, and systems for 8-bit floating-point matrix dot product instructions
INTEL CORP7 citations86
US10643297B2May 5, 2020
Dynamic precision management for integer deep learning primitives
INTEL CORP5 citations83
US11501139B2Nov 15, 2022
Scaling half-precision floating point tensors for training deep neural networks
INTEL CORP1 citations73
US11468303B2Oct 11, 2022
Scaling half-precision floating point tensors for training deep neural networks
INTEL CORP1 citations73
US11321805B2May 3, 2022
Dynamic precision management for integer deep learning primitives
INTEL CORP2 citations72
US10825127B2Nov 3, 2020
Dynamic precision management for integer deep learning primitives
INTEL CORP3 citations72
US11893490B2Feb 6, 2024
Incremental precision networks using residual inference and fine-grain quantization
INTEL CORP1 citations71
US11556772B2Jan 17, 2023
Incremental precision networks using residual inference and fine-grain quantization
INTEL CORP3 citations71
US12242846B2Mar 4, 2025
Supporting 8-bit floating point format operands in a computing architecture
INTEL CORP1 citations64
US12554489B2Feb 17, 2026
Supporting 8-bit floating point format operands in a computing architecture
INTEL CORP0 citations62
US12423102B2Sep 23, 2025
Instructions to convert from FP16 to BF8
INTEL CORP0 citations62
US12367045B2Jul 22, 2025
Instructions to convert from FP16 to BF8
INTEL CORP0 citations62
US12106210B2Oct 1, 2024
Scaling half-precision floating point tensors for training deep neural networks
INTEL CORP0 citations62
US12056489B2Aug 6, 2024
Apparatuses, methods, and systems for 8-bit floating-point matrix dot product instructions
INTEL CORP0 citations62
US11823034B2Nov 21, 2023
Scaling half-precision floating point tensors for training deep neural networks
INTEL CORP0 citations62
US11507815B2Nov 22, 2022
Scaling half-precision floating point tensors for training deep neural networks
INTEL CORP0 citations62
US12572359B2Mar 10, 2026
8-bit floating point square root and/or reciprocal square root instructions
INTEL CORP0 citations61
US12198055B2Jan 14, 2025
Incremental precision networks using residual inference and fine-grain quantization
INTEL CORP0 citations61
US11494163B2Nov 8, 2022
Conversion hardware mechanism
INTEL CORP1 citations58
US12135968B2Nov 5, 2024
Instructions to convert from FP16 to BF8
INTEL CORP0 citations52
US12524239B2Jan 13, 2026
Systems and methods for performing 8-bit floating-point vector dot product instructions
INTEL CORP0 citations51
US12399685B2Aug 26, 2025
Systolic array having support for output sparsity
INTEL CORP0 citations50
US10719317B2Jul 21, 2020
Hardware apparatuses and methods relating to elemental register accesses
INTEL CORP0 citations50
US9996347B2Jun 12, 2018
Hardware apparatuses and methods relating to elemental register accesses
INTEL CORP0 citations50
US12417100B2Sep 16, 2025
Instructions for structured-sparse tile matrix FMA
INTEL CORP0 citations47