Inventor

TAN CHUNG FOONG

US38 patents

⚠️ This page may combine multiple inventors who share the name “TAN CHUNG FOONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TAN CHUNG FOONG

CHARTERED SEMICONDUCTOR MFG

Material architecture for the fabrication of low temperature transistor

End of range (EOR) secondary defect engineering using substitutional carbon doping

Shallow amorphizing implant for gettering of deep secondary end of range defects

Avoiding plasma charging in integrated circuits

Process for fabricating a semiconductor device having embedded epitaxial regions

End of range (EOR) secondary defect engineering using chemical vapor deposition (CVD) substitutional carbon doping

Integrated circuit system employing grain size enlargement

Methods for normalizing strain in a semiconductor device

TOH ENG HUAT

Nano-electro-mechanical system (NEMS) structures with actuatable semiconductor fin on bulk substrates

FinFET with stressors

LDMOS with two gate stacks having different work functions for improved breakdown voltage

Finfet

LDMOS with improved breakdown voltage

Non-volatile memory utilizing impact ionization and tunnelling and method of manufacturing thereof

Methods to reduce gate contact resistance for AC reff reduction

Semiconductor device with reduced contact resistance and method of manufacturing thereof

GLOBALFOUNDRIES SG PTE LTD

LDMOS with improved breakdown voltage

Semiconductor device with reduced contact resistance and method of manufacturing thereof

Channel surface technique for fabrication of FinFET devices

FinFET

Strain-direct-on-insulator (SDOI) substrate and method of forming

LDMOS with improved breakdown voltage and with non-uniformed gate dielectric and gate electrode

FinFET with stressors

Non-volatile memory using pyramidal nanocrystals as electron storage elements

TAN CHUNG FOONG

Channel surface technique for fabrication of FinFET devices

Asymmetrical transistor device and method of fabrication

Method of forming transistor with increased gate width

Asymmetrical transistor device and method of fabrication

Integrated circuit system with bandgap material and method of manufacture thereof

GLOBALFOUNDRIES INC

Semiconductor structure including a transistor having stress creating regions and method for the formation thereof

Spacer structures for a transistor device

Methods of forming spacers adjacent gate structures of a transistor device

FinFET structure with dielectric bar containing gate to reduce effective capacitance, and method of forming same

TAN SHYUE SENG

Integrated circuit system employing resistance altering techniques

GLOBALFOUNDRIES US INC

N-well resistor

TEO LEE WEE

Memory cell with improved retention

QUEK ELGIN

Non-volatile memory using pyramidal nanocrystals as electron storage elements

YIN CHUNSHAN

Integrated circuit system with a floating dielectric region and method of manufacture thereof