Inventor

FALLAH FARZAN

US21 patents

⚠️ This page may combine multiple inventors who share the name “FALLAH FARZAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FALLAH FARZAN

FUJITSU LTD

Estimating software power consumption

Reducing power consumption at a cache

Method and apparatus for test program generation based on an instruction set description of a processor

Setting threshold voltages of cells in a memory block to reduce leakage in the memory block

Recycling charge to reduce energy consumption during mode transition in multithreshold complementary metal-oxide-semiconductor (MTCMOS) circuits

System and method for reducing transitions on address buses

Event-driven observability enhanced coverage analysis

PG-gated data retention technique for reducing leakage in memory cells

System and method for identifying optimal encoding for a given trace

Reduction of bus switching activity using an encoder and decoder

Sizing and placement of charge recycling (CR) transistors in multithreshold complementary metal-oxide-semiconductor (MTCMOS) circuits

Power mode transition in multi-threshold complementary metal oxide semiconductor (MTCMOS) circuits

System and method for eliminating common subexpressions in a linear system

Improving performance of a processor having a defective cache

Binary time-frame expansion of sequential systems

FALLAH FARZAN

Computer based methods and systems for establishing trust between two or more parties

Advanced methods and systems for text input error correction

Data entry systems and methods

NEC CORP

Simulation vector generation from HDL descriptions for observability-enhanced statement coverage

IDELAN INC

Advanced methods and systems for text input error correction

UNIV SOUTHERN CALIFORNIA

Reducing transitions on address buses using instruction-set-aware system and method