Inventor

ISHIDA EMI

US40 patents

⚠️ This page may combine multiple inventors who share the name “ISHIDA EMI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ISHIDA EMI

ADVANCED MICRO DEVICES INC

Laser tailoring retrograde channel profile in surfaces

Multiple channel implantation to form retrograde channel profile and to engineer threshold voltage and sub-surface punch-through

Reduction of boron penetration by laser anneal removal of fluorine

Epitaxial delta doping for retrograde channel profile

Use of knocked-on oxygen atoms for reduction of transient enhanced diffusion

Circuit fabrication method which optimizes source/drain contact resistance

Method of tilted implant for pocket, halo and source/drain extension in ULSI dense structures

Very low thermal budget channel implant process for semiconductors

Method of selectively annealing damaged doped regions

Silicidation and deep source-drain formation prior to source-drain extension formation

Reduction of poly depletion in semiconductor integrated circuits

Formation of low resistivity titanium silicide gates in semiconductor integrated circuits

Method and apparatus incorporating nitrogen selectively for differential oxide growth

Method to incorporate, and a device having, oxide enhancement dopants using gas immersion laser doping (GILD) for selectively growing an oxide layer

Method of inhibiting lateral diffusion between adjacent wells by introducing carbon or fluorine ions into bottom of STI groove

Oxygen implantation for reduction of junction capacitance in MOS transistors

Semiconductor fabrication with multiple low dose implant

Removable spacer technology using ion implantation to augment etch rate differences of spacer materials

Method to form narrow structure using double-damascene process

Deuterium doping for hot carrier reliability improvement

End-of-range damage suppression for ultra-shallow junction formation

Fabrication of raised source-drain transistor devices

Ion implantation with improved ion source life expectancy

MOS transistor processing utilizing UV-nitride removable spacer and HF etch

MOSFET with metal in gate for reduced gate resistance

Removable spacer technology using ion implantation for forming asymmetric MOS transistors

Source/drain doping technique for ultra-thin-body SOI MOS transistors

Gate formation method for reduced poly-depletion and boron penetration

MOS-type transistor processing utilizing UV-nitride removable spacer and HF etch

Retrograde well structure formation by nitrogen implantation

Semiconductor device with asymmetric channel dopant profile

Indium retrograde channel doping for improved gate oxide reliability

Method of manufacturing a semiconductor device having shallow junctions

Method of manufacturing semiconductor devices having uniform, fully doped gate electrodes

CMOS semiconductor device containing N-channel transistor having shallow LDD junctions

Oxide spacers as solid sources for gallium dopant introduction

Method for annealing damaged semiconductor regions allowing for enhanced oxide growth

Semiconductor processing employing a semiconductor spacer

UNIV LELAND STANFORD JUNIOR

Method of shallow junction formation in semiconductor devices using gas immersion laser doping

TOKUYAMA DENTAL CORP

Dental adhesive