Inventor
HAYCOCK MATTHEW B
US33 patents
⚠️ This page may combine multiple inventors who share the name “HAYCOCK MATTHEW B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
31 patentsUS6087847AJul 11, 2000
Impedance control circuit
INTEL CORP147 citations99
US6803790B2Oct 12, 2004
Bidirectional port with clock channel used for synchronization
INTEL CORP52 citations96
US6791356B2Sep 14, 2004
Bidirectional port with clock channel used for synchronization
INTEL CORP56 citations96
US6424175B1Jul 23, 2002
Biased control loop circuit for setting impedance of output driver
INTEL CORP58 citations96
US6373289B1Apr 16, 2002
Data and strobe repeater having a frequency control unit to re-time the data and reject delay variation in the strobe
INTEL CORP60 citations96
US6348811B1Feb 19, 2002
Apparatus and methods for testing simultaneous bi-directional I/O circuits
INTEL CORP59 citations96
US7177288B2Feb 13, 2007
Simultaneous transmission and reception of signals in different frequency bands over a bus line
INTEL CORP27 citations93
US6894536B2May 17, 2005
Low power NRZ interconnect for pulsed signaling
INTEL CORP36 citations93
US6847617B2Jan 25, 2005
Systems for interchip communication
INTEL CORP32 citations93
US6741107B2May 25, 2004
Synchronous clock generator for integrated circuits
INTEL CORP26 citations93
US6639426B2Oct 28, 2003
Apparatus for testing simultaneous bi-directional I/O circuits
INTEL CORP37 citations93
US6597198B2Jul 22, 2003
Current mode bidirectional port with data channel used for synchronization
INTEL CORP39 citations93
US6538584B2Mar 25, 2003
Transition reduction encoder using current and last bit sets
INTEL CORP27 citations93
US6536025B2Mar 18, 2003
Receiver deskewing of multiple source synchronous bits from a parallel bus
INTEL CORP31 citations93
US6529037B1Mar 4, 2003
Voltage mode bidirectional port with data channel used for synchronization
INTEL CORP29 citations93
US6441649B1Aug 27, 2002
Rail-to-rail input clocked amplifier
INTEL CORP19 citations93
US6437601B1Aug 20, 2002
Using a timing strobe for synchronization and validation in a digital logic device
INTEL CORP19 citations93
US6348826B1Feb 19, 2002
Digital variable-delay circuit having voltage-mixing interpolator and methods of testing input/output buffers using same
INTEL CORP63 citations93
US5410267AApr 25, 1995
3.3 V to 5 V supply interface buffer
INTEL CORP42 citations93
US6718416B1Apr 6, 2004
Method and apparatus for removing and installing a computer system bus agent without powering down the computer system
INTEL CORP36 citations92
US7120838B2Oct 10, 2006
Method and unit for deskewing signals
INTEL CORP11 citations84
US6747474B2Jun 8, 2004
Integrated circuit stubs in a point-to-point system
INTEL CORP17 citations84
US6653893B2Nov 25, 2003
Voltage margin testing of a transmission line analog signal using a variable offset comparator in a data receiver circuit
INTEL CORP16 citations84
US7653165B2Jan 26, 2010
Pulse amplitude modulated system with reduced intersymbol interference
INTEL CORP5 citations74
US6845424B2Jan 18, 2005
Memory pass-band signaling
INTEL CORP9 citations74
US6377103B1Apr 23, 2002
Symmetric, voltage-controlled CMOS delay cell with closed-loop replica bias
INTEL CORP10 citations74
US7222208B1May 22, 2007
Simultaneous bidirectional port with synchronization circuit to synchronize the port with another port
INTEL CORP8 citations73
US6901526B1May 31, 2005
Digital bus synchronizer for generating read reset signal
INTEL CORP5 citations73
US7391834B2Jun 24, 2008
Pulse amplitude modulated system with reduced intersymbol interference
INTEL CORP3 citations63
US7171510B2Jan 30, 2007
On-chip observability buffer to observer bus traffic
INTEL CORP3 citations63
US7328361B2Feb 5, 2008
Digital bus synchronizer for generating read reset signal
INTEL CORP0 citations51