Inventor

TRAN LUNG T

US64 patents

⚠️ This page may combine multiple inventors who share the name “TRAN LUNG T”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TRAN LUNG T

HEWLETT PACKARD DEVELOPMENT CO

Memory device array having a pair of magnetic bits sharing a common conductor line

Memory device array having a pair of magnetic bits sharing a common conductor line

Thermally-assisted switching of magnetic memory elements

Resistive cross point memory arrays having a charge injection differential sense amplifier

One-time programmable memory using fuse/anti-fuse and vertically oriented fuse unit memory cells

Multi-bit magnetic memory device

One-time programmable unit memory cell based on vertically oriented fuse and diode and one-time programmable memory using the same

Memory device capable of calibration and calibration methods therefor

Triple sample sensing for magnetic random access memory (MRAM) with series diodes

Method of fabricating an MRAM device including spin dependent tunneling junction memory cells

Write current compensation for temperature variations in memory arrays

Magneto resistive storage device having double tunnel junction

Magneto-resistive device having soft reference layer

Resistive cross point memory cell arrays having a cross-couple latch sense amplifier

Read methods for magneto-resistive device having soft reference layer

Diode for use in MRAM devices and method of manufacture

Thermal-assisted switching array configuration for MRAM

Method and system for performing equipotential sensing across a memory array to eliminate leakage currents

Magnetic memory devices having multiple bits per memory cell

Memory device capable of calibration and calibration methods therefor

Read operations on multi-bit memory cells in resistive cross point arrays

Magneto-resistive device including clad conductor

Method and system for performing equipotential sensing across a memory array to eliminate leakage currents

Resistive memory device and method for making the same

Memory device with a thermally assisted write

HEWLETT PACKARD CO

3-D memory device for large storage capacity

Memory device having memory cells capable of four states

Write circuit for large MRAM arrays

Cross point memory array including shared devices for blocking sneak path currents

Reference signal generation for magnetic random access memory devices

Equipotential sense methods for resistive cross point memory cell arrays

MRAM device including digital sense amplifiers

Memory device having memory cells with magnetic tunnel junction and tunnel junction in series

Reference signal generation for magnetic random access memory devices

Operational amplifier with digital offset calibration

Write circuit for large MRAM arrays

Solid-state memory with magnetic storage cells

MRAM device using magnetic field bias to improve reproducibility of memory cell switching

Magnetic random access memory (MRAM) device including differential sense amplifiers

MRAM device including write circuit for supplying word and bit line current having unequal magnitudes

Robust recording head for near-contact operation

Magneto-resistive device including soft reference layer having embedded conductors

Methods and structure for maximizing signal to noise ratio in resistive array

Solid-state memory with magnetic storage cells

Magneto-resistive sensor with opposing currents for reading perpendicularly recorded media

HEWLETT PACKARD COMPANY L P

Triple sample sensing for magnetic random access memory (MRAM) with series diodes

Write current compensation for temperature variations in memory arrays

HEWLETT PACKARD DEV COMPANY LL

Memory device having dual tunnel junction memory cells

SAMSUNG ELECTRONICS CO LTD

Thermally-assisted switching of magnetic memory elements

(unassigned)

Cladded read conductor for a pinned-on-the-fly soft reference layer