Inventor
STRANE JAY WILLIAM
US14 patents
Patents
14 patentsUS12568669B2Mar 3, 2026
Placeholder profile formation for backside contact
IBM0 citations62
US12557627B2Feb 17, 2026
Stacked FET with bottom epi size control and wraparound backside contact
IBM0 citations62
US12550420B2Feb 10, 2026
Top contact structures for stacked transistors
IBM0 citations62
US12538565B2Jan 27, 2026
Self-aligned bottom spacer
IBM0 citations62
US12446290B2Oct 14, 2025
Asymmetric gate extension in stacked FET
IBM0 citations62
US12356711B2Jul 8, 2025
Late gate extension
IBM0 citations62
US12310090B2May 20, 2025
CMOS top source/drain region doping and epitaxial growth for a vertical field effect transistor
IBM0 citations62
US12268030B2Apr 1, 2025
Self-aligned C-shaped vertical field effect transistor
IBM0 citations62
US11973125B2Apr 30, 2024
Self-aligned uniform bottom spacers for VTFETS
IBM0 citations62
US11646373B2May 9, 2023
Vertical field effect transistor with bottom spacer
IBM0 citations62
US11615990B2Mar 28, 2023
CMOS top source/drain region doping and epitaxial growth for a vertical field effect transistor
IBM0 citations62
US11251287B2Feb 15, 2022
Self-aligned uniform bottom spacers for VTFETS
IBM0 citations62
US11217692B2Jan 4, 2022
Vertical field effect transistor with bottom spacer
IBM0 citations62
US12183740B2Dec 31, 2024
Stacked field-effect transistors
IBM0 citations59