Inventor

GULICK DALE E

US147 patents

⚠️ This page may combine multiple inventors who share the name “GULICK DALE E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GULICK DALE E

ADVANCED MICRO DEVICES INC

Circuit and method for maintaining order of memory access requests initiated by devices coupled to a multiprocessor system

Architecture for a universal serial bus-based PC speaker controller

Method and apparatus for clock synchronization across an isochronous bus by adjustment of frame clock rates

Message based power management in a multi-processor system

Secure execution box

Message based power management

Personal computer security mechanism

System and method for monitoring and controlling a power-manageable resource based upon activities of a plurality of devices

Flexible probe/probe response routing for maintaining coherency

Interrupt driven isochronous task scheduler system

Isochronous task scheduling structure for a non-real-time operating system

Circuit and method for maintaining order of memory access requests initiated by devices in a multiprocessor system

Interconnect bus configured to implement multiple transfer protocols

Monolithic PC audio circuit with enhanced digital wavetable audio synthesizer

System including a host connected to a plurality of memory modules via a serial memory interconnect

Use of a signal line to adjust width and/or frequency of a communication link during system operation

Locking mechanism override and disable for personal computer ROM access protection

Microcomputer bridge architecture with an embedded microcontroller

Computer resource configuration mechanism across a multi-pipe communication link

System power management partitioned across a serial bus

Packet protocol for reading an indeterminate number of data bytes across a computer interconnection bus

Detecting a no-tags-free condition in a computer system having multiple outstanding transactions

Master isochronous clock structure having a clock controller coupling to a CPU and two data buses

Communication link with isochronous and asynchronous priority modes coupling bridge circuits in a computer system

Integrated CPU and memory controller utilizing a communication link having isochronous and asynchronous priority modes

Multi-channel, multi-rate isochronous data bus

Method and system for optimizing the flow of isochronous data and clock rate information

Computer system having an improved digital and analog configuration

Bus arbiter including aging factor counters to dynamically vary arbitration priority

Computer system having a dedicated multimedia engine and multimedia memory having arbitration logic which grants main memory access to either the CPU or multimedia engine

Computer system and method having a dedicated multimedia engine and including separate command and data paths

Single chip telephone answering machine, telephone, speakerphone, and ADSI controller

Clock generator capable of shut-down mode and clock generation method

Enhanced universal asynchronous receiver-transmitter

Data protocol controller

Computer system including a secure execution mode-capable CPU and a security services processor connected via a secure communication path

Initialization of a computer system including a secure execution mode-capable processor

Computer system including a bus bridge for connection to a security services processor

Configuring a communication link interface

Processing tasks with failure recovery

Enhanced security and manageability using secure storage in a personal computer system

Computer system employing a trusted execution environment including a memory controller configured to clear memory

External locking mechanism for personal computer memory locations

Resource sequester mechanism

Secure booting of a personal computer system

Managing a controller embedded in a bridge

Cryptographic randomness register for computer system security

Hardware interlock mechanism using a watchdog timer

Interruptable and re-enterable system management mode programming code

ADVANCED MICROSYSTEMS INC

Computer system having separate digital and analog system chips for improved performance