Inventor

UHLIG RICHARD A

US53 patents

⚠️ This page may combine multiple inventors who share the name “UHLIG RICHARD A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

UHLIG RICHARD A

INTEL CORP

System and method for binding virtual machines to hardware contexts

Apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment

Monitoring the operation of a processor

Transitioning between virtual machine monitor domains in a virtual machine environment

Support for nested fault in a virtual machine environment

Virtualizing memory type

Method for optimized representation of page table entries

Maintaining processor resources during architectural events

Maintaining processor resources during architectural events

System and method for controlling switching between VMM and VM using enabling value of VMM timer indicator and VMM timer value having a specified time

Methods and systems to manage machine state in virtual machine operations

Method, apparatus and system for improving security in a virtual machine host

Cross-function virtualization of a telecom core network

Support for transitioning to a virtual machine monitor based upon the privilege level of guest software

Methods and systems to control virtual machines

Maintaining processor resources during architectural events

Maintaining processor resources during architectural events

Method and apparatus for store durability and ordering in a persistent memory architecture

Cross-function virtualization of a telecom core network

Method for optimized representation of page table entries

Maintaining processor resources during architectural events

Synchronizing a translation lookaside buffer with an extended paging table

Synchronizing a translation lookaside buffer with an extended paging table

Synchronizing a translation lookaside buffer with an extended paging table

Synchronizing a translation lookaside buffer with an extended paging table

Synchronizing a translation lookaside buffer with an extended paging table

Synchronizing a translation lookaside buffer with an extended paging table

Maintaining processor resources during architectural events

Maintaining processor resources during architectural events

Virtualization event processing in a layered virtualization architecture

Maintaining processor resources during architectural evens

Monitoring the operation of a processor

Apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment

Cross-function virtualization of a telecom core network

Cross-function virtualization of a telecom core network

Maintaining processor resources during architectural events

Monitoring the operation of a processor

Virtualization event processing in a layered virtualization architecture

Virtualization event processing in a layered virtualization architecture

Delivering interrupts directly to a virtual processor

BENNETT STEVEN M

Virtualization event processing in a layered virtualization architecture

Interrupt processing in a layered virtualization architecture

Synchronizing a translation lookaside buffer with an extended paging table

Virtual interrupt processing in a layered virtualization architecture

Virtualization event processing in a layered virtualization architecture

Virtualization event processing in a layered virtualization architecuture

NEIGER GILBERT

Delivering interrupts directly to a virtual processor

Method and apparatus for a guest to access a privileged register

Virtualizing interrupt priority and delivery

Delivering interrupts directly to a virtual processor