Inventor

MARKOVICH VOYA RISTA

US48 patents

Patents

48 patents

US6178093B1Jan 23, 2001

Information handling system with circuit assembly having holes filled with filler material

IBM168 citations99

US5822856AOct 20, 1998

Method for conditioning halogenated polymeric materials and structures fabricated therewith

IBM35 citations95

US5685070ANov 11, 1997

Method of making printed circuit board

IBM75 citations94

US6974915B2Dec 13, 2005

Printed wiring board interposer sub-assembly and method

IBM16 citations93

US6695623B2Feb 24, 2004

Enhanced electrical/mechanical connection for electronic devices

IBM54 citations93

US6545226B2Apr 8, 2003

Printed wiring board interposer sub-assembly

IBM28 citations93

US6127025AOct 3, 2000

Circuit board with wiring sealing filled holes

IBM23 citations92

US5981880ANov 9, 1999

Electronic device packages having glass free non conductive layers

IBM33 citations92

US5800858ASep 1, 1998

Method for conditioning halogenated polymeric materials and structures fabricated therewith

IBM20 citations92

US5766670AJun 16, 1998

Via fill compositions for direct attach of devices and methods for applying same

IBM39 citations92

US5940729AAug 17, 1999

Method of planarizing a curved substrate and resulting structure

IBM41 citations91

US5707893AJan 13, 1998

Method of making a circuitized substrate using two different metallization processes

IBM26 citations91

US5887345AMar 30, 1999

Method for applying curable fill compositon to apertures in a substrate

IBM21 citations90

US5817405AOct 6, 1998

Circuitized substrate with same surface conductors of different resolutions

IBM25 citations89

US5672260ASep 30, 1997

Process for selective application of solder to circuit packages

IBM37 citations89

US5672980ASep 30, 1997

Method and apparatus for testing integrated circuit chips

IBM26 citations87

US5667934ASep 16, 1997

Thermally stable photoimaging composition

IBM19 citations86

US5759427AJun 2, 1998

Method and apparatus for polishing metal surfaces

IBM21 citations85

US6680440B1Jan 20, 2004

Circuitized structures produced by the methods of electroless plating

IBM14 citations84

US6114019ASep 5, 2000

Circuit board assemblies having filled vias free from bleed-out

IBM13 citations82

US5997997ADec 7, 1999

Method for reducing seed deposition in electroless plating

IBM15 citations81

US5709906AJan 20, 1998

Method for conditioning halogenated polymeric materials and structures fabricated therewith

IBM12 citations81

US6414509B1Jul 2, 2002

Method and apparatus for in-situ testing of integrated circuit chips

IBM18 citations79

US5656139AAug 12, 1997

Electroplating apparatus

IBM13 citations79

US6892451B2May 17, 2005

Method of making an interposer sub-assembly in a printed wiring board

IBM10 citations74

US6739048B2May 25, 2004

Process of fabricating a circuitized structure

IBM12 citations73

US6436803B2Aug 20, 2002

Manufacturing computer systems with fine line circuitized substrates

IBM11 citations73

US6131279AOct 17, 2000

Integrated manufacturing packaging process

IBM14 citations73

US5922517AJul 13, 1999

Method of preparing a substrate surface for conformal plating

IBM9 citations73

US5919596AJul 6, 1999

Toughened photosensitive polycyanurate resist, and structure made therefrom and process of making

IBM12 citations73

US5874154AFeb 23, 1999

Structure including a partially electrochemically reduced halogenated polymeric containing layer and an electrically conductive pattern

IBM9 citations73

US6150255ANov 21, 2000

Method of planarizing a curved substrate and resulting structure

IBM11 citations72

US5935652AAug 10, 1999

Method for reducing seed deposition in electroless plating

IBM11 citations72

US5665526ASep 9, 1997

Thermally stable photoimaging composition

IBM13 citations71

US6027858AFeb 22, 2000

Process for tenting PTH's with PID dry film

IBM11 citations70

US5893983AApr 13, 1999

Technique for removing defects from a layer of metal

IBM12 citations68

US5659256AAug 19, 1997

Method and apparatus for testing integrated circuit chips

IBM8 citations68

US6134772AOct 24, 2000

Via fill compositions for direct attach of devices and methods of applying same

IBM3 citations62

US5905018AMay 18, 1999

Method of preparing a substrate surface for conformal plating

IBM3 citations62

US6093335AJul 25, 2000

Method of surface finishes for eliminating surface irregularities and defects

IBM6 citations61

US6547974B1Apr 15, 2003

Method of producing fine-line circuit boards using chemical polishing

IBM6 citations59

MARKOVICH VOYA RISTA

Patents

Information handling system with circuit assembly having holes filled with filler material

Manufacturing circuit board assemblies having filled vias

Manufacturing computer systems with fine line circuitized substrates

Encapsulated circuitized power core alignment and lamination

Process for manufacturing a circuit board with filled holes

Process for manufacturing a circuit with filled holes

Modular circuit package having vertically aligned power and signal cores

Via fill compositions for direct attach of devices and method for applying same

Method for conditioning halogenated polymeric materials and structures fabricated therewith

Method of making printed circuit board

Printed wiring board interposer sub-assembly and method

Enhanced electrical/mechanical connection for electronic devices

Printed wiring board interposer sub-assembly

Circuit board with wiring sealing filled holes

Electronic device packages having glass free non conductive layers

Method for conditioning halogenated polymeric materials and structures fabricated therewith

Via fill compositions for direct attach of devices and methods for applying same

Method of planarizing a curved substrate and resulting structure

Method of making a circuitized substrate using two different metallization processes

Method for applying curable fill compositon to apertures in a substrate

Circuitized substrate with same surface conductors of different resolutions

Process for selective application of solder to circuit packages

Method and apparatus for testing integrated circuit chips

Thermally stable photoimaging composition

Method and apparatus for polishing metal surfaces

Circuitized structures produced by the methods of electroless plating

Circuit board assemblies having filled vias free from bleed-out

Method for reducing seed deposition in electroless plating

Method for conditioning halogenated polymeric materials and structures fabricated therewith

Method and apparatus for in-situ testing of integrated circuit chips

Electroplating apparatus

Method of making an interposer sub-assembly in a printed wiring board

Process of fabricating a circuitized structure

Manufacturing computer systems with fine line circuitized substrates

Integrated manufacturing packaging process

Method of preparing a substrate surface for conformal plating

Toughened photosensitive polycyanurate resist, and structure made therefrom and process of making

Structure including a partially electrochemically reduced halogenated polymeric containing layer and an electrically conductive pattern

Method of planarizing a curved substrate and resulting structure

Method for reducing seed deposition in electroless plating

Thermally stable photoimaging composition

Process for tenting PTH&#39;s with PID dry film

Technique for removing defects from a layer of metal

Method and apparatus for testing integrated circuit chips

Via fill compositions for direct attach of devices and methods of applying same

Method of preparing a substrate surface for conformal plating

Method of surface finishes for eliminating surface irregularities and defects

Method of producing fine-line circuit boards using chemical polishing

Process for tenting PTH's with PID dry film