Inventor
BERRY FRANK L
US24 patents
⚠️ This page may combine multiple inventors who share the name “BERRY FRANK L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
23 patentsUS6859867B1Feb 22, 2005
Translation and protection table and method of using the same to validate access requests
INTEL CORP73 citations98
US6760783B1Jul 6, 2004
Virtual interrupt mechanism
INTEL CORP117 citations98
US7363389B2Apr 22, 2008
Apparatus and method for enhanced channel adapter performance through implementation of a completion queue engine and address translation engine
INTEL CORP23 citations92
US7350028B2Mar 25, 2008
Use of a translation cacheable flag for physical address translation and memory protection in a host
INTEL CORP21 citations92
US6947970B2Sep 20, 2005
Method and apparatus for multilevel translation and protection table
INTEL CORP37 citations92
US6742051B1May 25, 2004
Kernel interface
INTEL CORP55 citations91
US11048579B2Jun 29, 2021
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
INTEL CORP3 citations84
US10379938B2Aug 13, 2019
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
INTEL CORP4 citations84
US9986028B2May 29, 2018
Techniques to replicate data between storage servers
INTEL CORP16 citations84
US9645884B2May 9, 2017
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
INTEL CORP5 citations84
US9116684B2Aug 25, 2015
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
INTEL CORP4 citations84
US8769385B2Jul 1, 2014
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
INTEL CORP4 citations84
US7925957B2Apr 12, 2011
Validating data using processor instructions
INTEL CORP14 citations83
US7523378B2Apr 21, 2009
Techniques to determine integrity of information
INTEL CORP12 citations82
US8856627B2Oct 7, 2014
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
INTEL CORP3 citations74
US8793559B2Jul 29, 2014
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
INTEL CORP3 citations74
US8775912B2Jul 8, 2014
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
INTEL CORP3 citations74
US8775910B2Jul 8, 2014
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
INTEL CORP3 citations74
US8775911B2Jul 8, 2014
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
INTEL CORP3 citations74
US8769386B2Jul 1, 2014
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
INTEL CORP3 citations74
US11899530B2Feb 13, 2024
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
INTEL CORP0 citations73
US9262159B2Feb 16, 2016
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
INTEL CORP2 citations68
US9632973B2Apr 25, 2017
Supporting RMA API over active message
INTEL CORP0 citations41