Inventor

XUE HANHONG

US50 patents

⚠️ This page may combine multiple inventors who share the name “XUE HANHONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

XUE HANHONG

IBM

Performing an asynchronous memory move (AMM) via execution of AMM store instruction within the instruction set architecture

Specialized memory move barrier operations

Handling of address conflicts during asynchronous memory move operations

Facilitating communication within shared memory environments using lock-free queues

Memory sharing in a distributed data processing system using modified address space to create extended address space for copying data

Simulation of high performance computing (HPC) application environment using virtual nodes

Reporting of partially performed memory move

Completion of asynchronous memory move in the presence of a barrier operation

Termination of in-flight asynchronous memory move

Method for enabling direct prefetching of data during asychronous memory move operation

Mechanism to provide reliability through packet drop detection

Mechanism to perform debugging of global shared memory (GSM) operations

Mechanism to provide software guaranteed reliability for GSM operations

System and method for intelligent software-controlled cache injection

Issuing global shared memory operations via direct cache injection to a host fabric interface

Method and system for efficiently transferring a self-defined non-contiguous message in a one-sided communication model

Empirical determination of adapter affinity in high performance computing (HPC) environment

Launching multiple concurrent memory moves via a fully asynchronoous memory mover

Simulation of high performance computing (HPC) application environment using virtual nodes

Preparing parallel tasks to use a synchronization register

Effective use of a hardware barrier synchronization register for protocol synchronization

Interface method, system, and program product for facilitating layering of a data communications protocol over an active message layer protocol

Acknowledging incoming messages

Empirical determination of adapter affinity in high performance computing (HPC) environment

Responding to a timeout of a message in a parallel computer

Responding to a timeout of a message in a parallel computer

Sharing lock mechanism between protocol layers

Acknowledging incoming messages

Flow control for reliable message passing

Flow control for reliable message passing

System and method for movement of non-aligned data in network buffer model

ARIMILLI LAKSHMINARAYANA B

Host fabric interface (HFI) to perform global shared memory (GSM) operations

Collective acceleration unit tree flow control and retransmit

Mechanism to prevent illegal access to task address space by unauthorized tasks

Generating and issuing global shared memory operations via a send FIFO

Guaranteeing delivery of multi-packet GSM messages

Collective acceleration unit tree structure

Collective acceleration unit tree structure

ARIMILLI RAVI K

Fully asynchronous memory mover

Cache management during asynchronous memory move operations

Asynchronous memory move across physical nodes with dual-sided communication

Mechanisms for communicating with an asynchronous memory mover to perform AMM operations

CHAN UMAN

Flow control for reliable message passing

Managing a region cache

JEA TSAI-YANG

Preparing parallel tasks to use a synchronization register

KIM CHULHO

Techniques for debugging code during runtime

THAI HUNG Q

Load balancing of adapters on a multi-adapter node

ARMILLI LAKSHMINARAYANA B

Mechanisms to order global shared memory operations

ARCHER CHARLES J

Establishing a group of endpoints in a parallel computer

COPPINGER RICHARD J

Managing preemption in a parallel computing system