Inventor

SHIH YEN-HAO

TW97 patents

⚠️ This page may combine multiple inventors who share the name “SHIH YEN-HAO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHIH YEN-HAO

MACRONIX INT CO LTD

Methods of operating non-volatile memory cells having an oxide/nitride multilayer insulating structure

Operation scheme for spectrum shift in charge trapping non-volatile memory

Operation scheme with charge balancing for charge trapping non-volatile memory

Three-dimensional memory devices and methods of manufacturing and operating the same

Methods to resolve hard-to-erase condition in charge trapping non-volatile memory

Vertical channel transistor structure and manufacturing method thereof

Phase change device having two or more substantial amorphous regions in high resistance state

One-time programmable read only memory and manufacturing method thereof

Semiconductor structure and method for manufacturing the same

Multi-layer memory array and manufacturing method of the same

Conductor with a plurality of vertical extensions for a 3D device

Conductor structure and method

Composite target sputtering for forming doped phase change materials

Phase change memory having one or more non-constant doping profiles

Dual-gate, sonos, non-volatile memory cells and arrays thereof

Methods to resolve hard-to-erase condition in charge trapping non-volatile memory

Manufacturing method of one-time programmable read only memory

Methods of forming low hydrogen concentration charge-trapping layer structures for non-volatile memory

Three dimensional stacked semiconductor structure

Memory device and manufacturing method of the same

High aspect ratio etching method

Memory structure and method for manufacturing the same

Phase change memory with fast write characteristics

Method for manufacturing memory cell

Conductor structure and method

Integrated circuit and operating method for the same

Three dimensional stacked semiconductor structure and method for manufacturing the same

Array arrangement including carrier source

LUNG HSIANG-LAN

3D memory array arranged for FN tunneling program and erase

3D memory array arranged for FN tunneling program and erase

3D two bit-per-cell NAND flash memory

Phase change memory coding

Memory device and method for sensing and fixing margin cells

Dielectric mesh isolated phase change structure for phase change memory

Dielectric charge trapping memory cells with redundancy

Memory cell access device having a pn-junction with polycrystalline and single crystal semiconductor regions

CHEN SHIH-HUNG

Damascene word line

Semiconductor structure with improved capacitance of bit line

Contact architecture for 3D memory array

NAND flash with non-trapping switch transistors

Damascene word line

SHIH YEN-HAO

Operation scheme with high work function gate and charge balancing for charge trapping non-volatile memory

Method for forming interlayer connectors in a three-dimensional stacked IC device

Methods and apparatus for reducing defect bits in phase change memory

CHENG HUAI-YU

Ge-Rich GST-212 phase change memory materials

Composite target sputtering for forming doped phase change materials

LUE HANG-TING

Integration of 3D stacked IC device with peripheral circuits

MACRONIX INTERNAT CO INTL

Operation scheme with charge balancing erase for charge trapping non-volatile memory

HSU TZU-HSUAN

Non-volatile memory and non-volatile memory cell having asymmetrical doped structure

LEE MING-HSIU

Rewritable memory device based on segregation/re-absorption