Inventor

HOINKIS MARK

US23 patents

⚠️ This page may combine multiple inventors who share the name “HOINKIS MARK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HOINKIS MARK

INFINEON TECHNOLOGIES AG

Method of making a microelectronic structure

Method for depositing a metal layer on a semiconductor interconnect structure having a capping layer

Back end interconnect with a shaped interface

Reduction of the shear stress in copper via&#39;s in organic interlayer dielectric material

Device interconnection

Method and apparatus of stress relief in semiconductor structures

Crystallographic modification of hard mask properties

Method and apparatus of stress relief in semiconductor structures

IBM

Bilayered metal hardmasks for use in Dual Damascene etch schemes

Subtractive plasma etching of a blanket layer of metal or metal alloy

Chromium adhesion layer for copper vias in low-k technology

Copper vias in low-k technology

Bilayered metal hardmasks for use in dual damascene etch schemes

CVD/PVD method of filling structures using discontinuous CVD AL liner

Dual damascene structure and method

Back end interconnect with a shaped interface

APPLIED MATERIALS INC

Copper residue chamber clean

Selective sputtering for pattern transfer

Process for overcoming CVD aluminum selectivity loss with warm PVD aluminum

Methods for etching a metal layer to form an interconnection structure for semiconductor applications

INFINEON TECHNOLOGIES CORP

Vertical fuse and method of fabrication

Vertical fuse and method of fabrication

SIEMENS AG

Method and apparatus for determining wafer warpage for optimized electrostatic chuck clamping voltage

Reduction of the shear stress in copper via's in organic interlayer dielectric material