Inventor
YANG HAINING
US135 patents
⚠️ This page may combine multiple inventors who share the name “YANG HAINING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
23 patentsUS7605081B2Oct 20, 2009
Sub-lithographic feature patterning using self-aligned self-assembly polymers
IBM100 citations98
US7592247B2Sep 22, 2009
Sub-lithographic local interconnects, and methods for forming same
IBM75 citations98
US7553760B2Jun 30, 2009
Sub-lithographic nano interconnect structures, and method for forming same
IBM119 citations98
US7514339B2Apr 7, 2009
Method for fabricating shallow trench isolation structures using diblock copolymer patterning
IBM57 citations98
US6939814B2Sep 6, 2005
Increasing carrier mobility in NFET and PFET transistors on a common wafer
IBM97 citations98
US7816231B2Oct 19, 2010
Device structures including backside contacts, and methods for forming same
IBM55 citations94
US7984408B2Jul 19, 2011
Structures incorporating semiconductor device structures with reduced junction capacitance and drain induced barrier lowering
IBM36 citations93
US7531423B2May 12, 2009
Reduced-resistance finFETs by sidewall silicidation and methods of manufacturing the same
IBM23 citations93
US7384852B2Jun 10, 2008
Sub-lithographic gate length transistor using self-assembling polymers
IBM18 citations93
US7101744B1Sep 5, 2006
Method for forming self-aligned, dual silicon nitride liner for CMOS devices
IBM28 citations93
US6660581B1Dec 9, 2003
Method of forming single bitline contact using line shape masks for vertical transistors in DRAM/e-DRAM devices
IBM55 citations93
US6642566B1Nov 4, 2003
Asymmetric inside spacer for vertical transistor
IBM29 citations93
US7943452B2May 17, 2011
Gate conductor structure
IBM7 citations84
US7687395B2Mar 30, 2010
Contact aperture and contact via with stepped sidewall and methods for fabrication thereof
IBM11 citations84
US7678658B2Mar 16, 2010
Structure and method for improved SRAM interconnect
IBM18 citations84
US7569434B2Aug 4, 2009
PFETs and methods of manufacturing the same
IBM11 citations84
US7479689B2Jan 20, 2009
Electronically programmable fuse having anode and link surrounded by low dielectric constant material
IBM8 citations84
US7388267B1Jun 17, 2008
Selective stress engineering for SRAM stability improvement
IBM16 citations82
US7576003B2Aug 18, 2009
Dual liner capping layer interconnect structure and method
IBM5 citations74
US7560382B2Jul 14, 2009
Embedded interconnects, and methods for forming same
IBM5 citations74
US7482270B2Jan 27, 2009
Fully and uniformly silicided gate structure and method for forming same
IBM7 citations74
US7436030B2Oct 14, 2008
Strained MOSFETs on separated silicon layers
IBM8 citations74
US6908806B2Jun 21, 2005
Gate metal recess for oxidation protection and parasitic capacitance reduction
IBM10 citations74
QUALCOMM INC
12 patentsUS10825536B1Nov 3, 2020
Programmable circuits for performing machine learning operations on edge devices
QUALCOMM INC19 citations94
US11393819B2Jul 19, 2022
Semiconductor device implemented with buried rails
QUALCOMM INC7 citations86
US10622479B1Apr 14, 2020
Circuits employing a double diffusion break (DDB) and single diffusion break (SDB) in different type diffusion region(s), and related fabrication methods
QUALCOMM INC17 citations86
US10950609B2Mar 16, 2021
Gate-all-around (GAA) and fin field-effect transistor (FinFet) hybrid static random-access memory (SRAM)
QUALCOMM INC8 citations84
US9698232B2Jul 4, 2017
Conductive cap for metal-gate transistor
QUALCOMM INC18 citations84
US9653466B2May 16, 2017
FinFET device and method of making the same
QUALCOMM INC15 citations84
US9537007B2Jan 3, 2017
FinFET with cut gate stressor
QUALCOMM INC12 citations84
US9633996B1Apr 25, 2017
High density area efficient thin-oxide decoupling capacitor using conductive gate resistor
QUALCOMM INC8 citations83
US10833017B2Nov 10, 2020
Contact for semiconductor device
QUALCOMM INC4 citations73
US10679994B1Jun 9, 2020
Circuits employing asymmetric diffusion breaks in different type semiconductor diffusion regions, and related fabrication methods
QUALCOMM INC4 citations73
US10483200B1Nov 19, 2019
Integrated circuits (ICs) employing additional output vertical interconnect access(es) (VIA(s)) coupled to a circuit output VIA to decrease circuit output resistance
QUALCOMM INC5 citations73
US10431686B1Oct 1, 2019
Integrated circuit (IC) employing a channel structure layout having an active semiconductor channel structure(s) and an isolated neighboring dummy semiconductor channel structure(s) for increased uniformity
QUALCOMM INC6 citations73
MICRON TECHNOLOGY INC
11 patentsUS6524867B2Feb 25, 2003
Method for forming platinum-rhodium stack as an oxygen barrier
MICRON TECHNOLOGY INC121 citations99
US6518610B2Feb 11, 2003
Rhodium-rich oxygen barriers
MICRON TECHNOLOGY INC104 citations99
US6391801B1May 21, 2002
Method of forming a layer comprising tungsten oxide
MICRON TECHNOLOGY INC29 citations93
US7038263B2May 2, 2006
Integrated circuits with rhodium-rich structures
MICRON TECHNOLOGY INC4 citations74
US6858536B2Feb 22, 2005
Processes to form a metallic film stack
MICRON TECHNOLOGY INC5 citations74
US6781175B2Aug 24, 2004
Rhodium-rich integrated circuit capacitor electrode
MICRON TECHNOLOGY INC6 citations74
US6759705B2Jul 6, 2004
Platinum-rhodium stack as an oxygen barrier in an integrated circuit capacitor
MICRON TECHNOLOGY INC4 citations74
US6740554B2May 25, 2004
Methods to form rhodium-rich oxygen barriers
MICRON TECHNOLOGY INC5 citations74
US6596596B2Jul 22, 2003
Methods of forming a field effect transistors
MICRON TECHNOLOGY INC5 citations74
US6555473B2Apr 29, 2003
Field effect transistors and methods of forming a field effect transistor
MICRON TECHNOLOGY INC5 citations74
US6475856B1Nov 5, 2002
Capacitors and capacitor forming methods
MICRON TECHNOLOGY INC10 citations74
INFINEON TECHNOLOGIES AG
1 patentCHARTERED SEMICONDUCTOR MFG
1 patentROADMAP SYSTEMS LTD
1 patentYANG CHIH-CHAO
1 patentShowing the top 50 of 135 patents by PatentIndex Score.