Inventor
HOU CLIFF
TW20 patents
⚠️ This page may combine multiple inventors who share the name “HOU CLIFF”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG
18 patentsUS7954072B2May 31, 2011
Model import for electronic design automation
TAIWAN SEMICONDUCTOR MFG20 citations92
US7797646B2Sep 14, 2010
Method for using mixed multi-Vt devices in a cell-based design
TAIWAN SEMICONDUCTOR MFG17 citations92
US7783999B2Aug 24, 2010
Electrical parameter extraction for integrated circuit design
TAIWAN SEMICONDUCTOR MFG23 citations92
US7685558B2Mar 23, 2010
Method for detection and scoring of hot spots in a design layout
TAIWAN SEMICONDUCTOR MFG28 citations92
US7281230B2Oct 9, 2007
Method of using mixed multi-Vt devices in a cell-based design
TAIWAN SEMICONDUCTOR MFG16 citations92
US7262951B2Aug 28, 2007
De-coupling capacitors produced by utilizing dummy conductive structures integrated circuits
TAIWAN SEMICONDUCTOR MFG16 citations92
US7017132B2Mar 21, 2006
Methodology to optimize hierarchical clock skew by clock delay compensation
TAIWAN SEMICONDUCTOR MFG20 citations92
US6587997B1Jul 1, 2003
Automatic resistance and capacitance technology file generator for multiple RC extractors
TAIWAN SEMICONDUCTOR MFG33 citations92
US6789248B1Sep 7, 2004
Method and apparatus to perform resistance and capacitance (RC) parameter customization for better timing closure results in physical synthesis and optimization
TAIWAN SEMICONDUCTOR MFG41 citations90
US6862723B1Mar 1, 2005
Methodology of generating antenna effect models for library/IP in VLSI physical design
TAIWAN SEMICONDUCTOR MFG42 citations89
US6797999B2Sep 28, 2004
Flexible routing channels among vias
TAIWAN SEMICONDUCTOR MFG14 citations84
US8037575B2Oct 18, 2011
Method for shape and timing equivalent dimension extraction
TAIWAN SEMICONDUCTOR MFG17 citations83
US7640520B2Dec 29, 2009
Design flow for shrinking circuits having non-shrinkable IP layout
TAIWAN SEMICONDUCTOR MFG15 citations83
US7801717B2Sep 21, 2010
Method for smart dummy insertion to reduce run time and dummy count
TAIWAN SEMICONDUCTOR MFG6 citations63
US8352888B2Jan 8, 2013
Model import for electronic design automation
TAIWAN SEMICONDUCTOR MFG3 citations62
US7994606B2Aug 9, 2011
De-coupling capacitors produced by utilizing dummy conductive structures integrated circuits
TAIWAN SEMICONDUCTOR MFG4 citations62
US7793130B2Sep 7, 2010
Mother/daughter switch design with self power-up control
TAIWAN SEMICONDUCTOR MFG5 citations62
US7247894B2Jul 24, 2007
Very fine-grain voltage island integrated circuit
TAIWAN SEMICONDUCTOR MFG0 citations48