Inventor
VAKIRTZIS CHARLES
US4 patents
Patents
4 patentsUS7519927B1Apr 14, 2009
Wiring methods to reduce metal variation effects on launch-capture clock pairs in order to minimize cycle-time overlap violations
IBM22 citations85
US7904861B2Mar 8, 2011
Method, system, and computer program product for coupled noise timing violation avoidance in detailed routing
IBM2 citations58
US8032851B2Oct 4, 2011
Structure for an integrated circuit design for reducing coupling between wires of an electronic circuit
IBM0 citations48
US8006208B2Aug 23, 2011
Reducing coupling between wires of an electronic circuit
IBM0 citations48