Inventor

HIERLEMANN MATTHIAS

US22 patents

⚠️ This page may combine multiple inventors who share the name “HIERLEMANN MATTHIAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HIERLEMANN MATTHIAS

INFINEON TECHNOLOGIES AG

Piezoelectric stress liner for bulk and SOI

Method and apparatus for manufacturing a semiconductor

Buried gate transistor

Field-effect transistor structure and associated semiconductor memory cell

Methods of manufacturing semiconductor devices with rotated substrates

Implantation process in semiconductor fabrication

Method and apparatus for semiconductor device fabrication using a reconstituted wafer

Tunable stressed polycrystalline silicon on dielectrics in an integrated circuit

Implantation process in semiconductor fabrication

Method and apparatus of stress relief in semiconductor structures

Silicon-on-insulator chip having multiple crystal orientations

Buried gate transistor

Capacitors and methods of manufacture thereof

Memory cell, wafer, semiconductor component with memory cell having insulation collars and method for fabricating an insulating collar for a memory cell

Method and apparatus of stress relief in semiconductor structures

HIERLEMANN MATTHIAS

Capacitors and methods of manufacture thereof

Tunable stressed polycrystalline silicon on dielectrics in an integrated circuit

BARTH HANS-JOACHIM

Method and apparatus for semiconductor device fabrication using a reconstituted wafer

IBM

Semiconductor devices with rotated substrates and methods of manufacture thereof

TILKE ARMIN

Silicon-on-insulator chip having multiple crystal orientations

LINDSAY RICHARD

Buried gate transistor

KALTALIOGLU ERDEM

Pads with different width in a scribe line region and method for manufacturing these pads