Inventor

MASUOKA FUJIO

JP394 patents

⚠️ This page may combine multiple inventors who share the name “MASUOKA FUJIO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MASUOKA FUJIO

TOSHIBA KK

MOS-type semiconductor integrated circuit device

Electrically erasable programmable read-only memory with NAND cell structure

Semiconductor device and process for manufacturing the same

Electrically erasable programmable read-only memory with NAND cell structure that suppresses memory cell threshold voltage variation

Electrically erasable programmable read-only memory with threshold value controller for data programming and method of programming the same

Electrically erasable programmable read-only memory with NAND cell structure

Semiconductor memory device

Semiconductor memory device

Non-volatile semiconductor memory device

Electrically erasable programmable read-only memory with nand cell

Semiconductor memory using dynamic ram cells

Divided bit line type dynamic random access memory with charging/discharging current suppressor

Semiconductor memory device having error detection/correction function

CMOS hysteresis circuit with enable switch or natural transistor

Electrically erasable programmable read-only memory with NAND cellstructure

Electrically erasable programmable read-only memory with threshold value controller for data programming

NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines

Electrically erasable programmable read-only memory with threshold value controller for data programming

NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines

Semiconductor memory device

Electrically erasable programmable read-only memory with threshold value measurement circuit

Electrically erasable progammable read-only memory with nand cell blocks

Electrically erasable programmable read-only memory with NAND memory cell structure

UNISANTIS ELECT SINGAPORE PTE

Vertical transistor with dielectrically-isolated work-function metal electrodes surrounding the semiconductor pillar

Semiconductor device and method for producing semiconductor device

Semiconductor device

Semiconductor device

Semiconductor device

Semiconductor device

Semiconductor device

Method for manufacturing semiconductor device and semiconductor device

Method for producing semiconductor device and semiconductor device

Method for manufacturing semiconductor device and semiconductor device

Method for producing semiconductor device and semiconductor device

Semiconductor device including a MOS transistor and production method therefor

Solid state imaging device

Semiconductor memory device and production method therefor

Semiconductor device and production method therefor

MASUOKA FUJIO

Semiconductor memory including cell(s) with both charge storage layer(s) and control gate laterally surrounding island-like semiconductor layer

Semiconductor device and production method therefor

Semiconductor device and manufacturing method thereof

Semiconductor memory and its production process

Semiconductor device including a MOS transistor and production method therefor

Semiconductor device having increased gate length implemented by surround gate transistor arrangements

TOKYO SHIBAURA ELECTRIC CO

Semiconductor memory device

Electrically erasable and electrically programmable read only memory

Semiconductor integrated circuit device with low power consumption in a standby mode using an on-chip substrate bias generator

Semiconductor device

UNISANTIS ELECTRONICS JP LTD

CMOS inverter coupling circuit comprising vertical transistors

SHARP KK

Semiconductor memory with gate at least partially located in recess defined in vertically oriented semiconductor layer