Inventor

CHENG JYE-YEN

TW37 patents

⚠️ This page may combine multiple inventors who share the name “CHENG JYE-YEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHENG JYE-YEN

TAIWAN SEMICONDUCTOR MFG CO LTD

Structure and formation method of damascene structure

Semiconductor device and manufacturing method thereof

Structure and formation method of damascene structure

Methods of fabricating integrated circuit devices having raised via contacts

Integrated circuit devices having raised via contacts and methods of fabricating the same

Interconnect structures and methods of forming same

Semiconductor device comprising air gaps having different configurations

Semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Methods of fabricating integrated circuit devices having reduced line end spaces

Method for manufacturing semiconductor structure having raised via contacts

Semiconductor device comprising air gaps having different configurations

Method and system of generating layout

Semiconductor device and manufacturing method thereof

Interconnect structure and method of forming the same

Semiconductor device and manufacturing method thereof

Formation method of damascene structure

Semiconductor device and manufacturing method thereof

Structure and formation method of damascene structure

Semiconductor device and manufacturing method thereof

Method of forming capacitor structure

Method for line stress reduction through dummy shoulder structures

Metal gate transistor, integrated circuits, systems, and fabrication methods thereof

Method and system of generating a layout including a fuse layout pattern

Semiconductor device and manufacturing method thereof

TAIWAN SEMICONDUCTOR MFG

Stacked contact with low aspect ratio

Method and device for addressable failure site test structure

Method for damascene formation using plug materials having varied etching rates

IND TECH RES INST

Method of texture by in-situ masking and etching for thin film magnetic recording medium

CHANG CHUNG-LONG

Contact structure for reducing gate resistance and method of making the same

WINBOND ELECTRONICS CORP

Chemical-mechanical polishing method for forming plugs

YU CHEN-HUA

Method for stacked contact with low aspect ratio

HO CHIEN-CHIH

Metal gate transistor, integrated circuits, systems, and fabrication methods thereof

KUO CHENG CHENG

Dummy shoulder structure for line stress reduction

HUA WEI-CHUN

Protection structure for metal-oxide-metal capacitor