Inventor

ASANO MASAMICHI

JP92 patents

⚠️ This page may combine multiple inventors who share the name “ASANO MASAMICHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ASANO MASAMICHI

TOSHIBA KK

Semiconductor memory device

Non-volatile semiconductor memory device and memory system using the same

Non-volatile semiconductor memory device with an improved verify voltage generator

Non-volatile semiconductor memory device and memory system using the same

Non-volatile semiconductor memory device and memory system using the same

Non-volatile semiconductor memory device and memory system using the same

Non-volatile semiconductor memory device and memory system using the same

Non-volatile semiconductor memory device and memory system using the same

Non-volatile semiconductor memory device

Block erasable nonvolatile memory device

Erase circuitry for a non-volatile semiconductor memory device

Semiconductor memory device with a sense amplifier

Electrically-erasable/programmable nonvolatile semiconductor memory device

Nonvolatile semiconductor memory

High voltage booster circuit for use in EEPROMs

Nonvolatile semiconductor memory device with readout test circuitry

Non-volatile semiconductor memory device and memory system using the same

Non-volatile semiconductor memory device and memory system using the same

Non-volatile semiconductor memory device and memory system using the same

Non-volatile semiconductor memory device and memory system using the same

Non-volatile semiconductor memory device

Non-volatile semiconductor memory device using successively longer write pulses

Non-volatile semiconductor memory

Voltage detecting circuit

Non-volatile semiconductor memory and method of manufacturing the same

Non-volatile semiconductor memory device

Semiconductor memory device with external capacitor to charge pump in an EEPROM circuit

Non-volatile semiconductor memory device

Non-volatile semiconductor memory and method of manufacturing the same

Nonvolatile semiconductor memory device with offset transistor

Semiconductor memory device having transfer gates which prevent high voltages from being applied to memory and dummy cells in the reading operation

Semiconductor memory device having a majority logic for determining data to be read out

Delay circuit that resets after pulse-like noise

Non-volatile semiconductor memory

Electrically erasable non-volatile semiconductor device

Output circuit of semiconductor integrated circuit device

Semiconductor memory device with redundancy circuit

Electrostatic discharge protection circuit with variable limiting threshold for MOS device

Nonvolatile semiconductor memory having a stress relaxing voltage applied to erase gate during data write

TOKYO SHIBAURA ELECTRIC CO

Non-volatile semiconductor memory system

Semiconductor memory with delay means to reduce peak currents

Semiconductor memory device

Semiconductor integrated circuit with a response time compensated with respect to temperature

Logic circuit having voltage booster

Non-volatile semiconductor memory system

Nonvolatile semiconductor memory device

Multifunction terminal circuit

Method of integrating MOS devices of double and single gate structure

Circuit including an MOS transistor whose gate is protected from oxide rupture

TAKIZAWA MAKOTO

Mask ROM with spare memory cells