Inventor

SUNG CHUN-YUNG

US58 patents

⚠️ This page may combine multiple inventors who share the name “SUNG CHUN-YUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SUNG CHUN-YUNG

IBM

Method of fabricating a field effect transistor having improved junctions

Buried plate structure for vertical dram devices

Laser processing method for trench-edge-defect-free solid phase epitaxy in confined geometrics

Deep trench capacitor with buried plate electrode and isolation collar

Orientation-optimized PFETS in CMOS devices employing dual stress liners

Method for forming semiconductor chip with graphene based devices in an interconnect structure of the chip

CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials

Method of reducing detrimental STI-induced stress in MOSFET channels

Method to reduce contact resistance on thin silicon-on-insulator device

Trench-edge-defect-free recrystallization by edge-angle-optimized solid phase epitaxy: method and applications to hybrid orientation substrates

Semiconductor devices with rotated substrates and methods of manufacture thereof

Method and structure to reduce contact resistance on thin silicon-on-insulator device

Amorphization/templated recrystallization method for hybrid orientation substrates

Metal-insulator-metal capacitor and method of fabricating same

Amorphization/templated recrystallization method for hybrid orientation substrates

Vertical DRAM device with self-aligned upper trench shaping

Metal-insulator-metal capacitor and method of fabricating same

Method for fabricating a trench having a buried dielectric collar

Method of forming CMOS with Si:C source/drain by laser melting and recrystallization

Field effect transistor with mixed-crystal-orientation channel and source/drain regions

Graphene based structures and methods for shielding electromagnetic radiation

Graphene based structures and methods for shielding electromagnetic radiation

Enhancement of electron and hole mobilities in &lt;110&gt; Si under biaxial compressive strain

Enhancement of electron and hole mobilities in &lt;110&gt; Si under biaxial compressive strain

SRAM with asymmetrical pass gates

Trench-edge-defect-free recrystallization by edge-angle-optimized solid phase epitaxy: method and applications to hybrid orientation substrates

Amorphization/templated recrystallization method for hybrid orientation substrates

Hybrid orientation semiconductor structure with reduced boundary defects and method of forming same

Opto-thermal mask including aligned thermal dissipative layer, reflective layer and transparent capping layer

AVOURIS PHAEDON

Graphene based structures and methods for broadband electromagnetic radiation absorption at the microwave and terahertz frequencies

Graphene based structures and methods for shielding electromagnetic radiation

Generation of terahertz electromagnetic waves in graphene by coherent photon-mixing

Graphene based structures and methods for shielding electromagnetic radiation

INFINEON TECHNOLOGIES AG

Semiconductor method and device with mixed orientation substrate

Methods of manufacturing semiconductor devices with rotated substrates

Semiconductor method and device with mixed orientation substrate

CHU JACK O

Graphene growth on a carbon-containing semiconductor layer

Graphene growth on a non-hexagonal lattice

Graphene growth on a carbon-containing semiconductor layer

CHEN HOWARD H

Sea-of-fins structure on a semiconductor substrate and method of fabrication

Sea-of-fins structure on a semiconductor substrate and method of fabrication

CHAN VICTOR

Dual trench isolation for CMOS with hybrid orientations

Dual trench isolation for CMOS with hybrid orientations

CHEN TZE-CHIANG

CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials

CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials

AGERE SYST GUARDIAN CORP

Method of making dual damascene interconnect structure and metal electrode capacitor

AGERE SYSTEMS INC

Damascene structure having a metal-oxide-metal capacitor associated therewith

DIMITRAKOPOULOS CHRISTOS D

Semiconductor chip with graphene based devices in an interconnect structure of the chip

LI XUESONG

Method for synthesizing a thin film

YIN HAIZHOU

Hybrid orientation semiconductor structure with reduced boundary defects and method of forming same

Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain

Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain