Inventor · disambiguated record
Elliot A. Sowadsky
Also filed as: SOWADSKY ELLIOT · SOWADSKY ELLIOT A
15 granted patents·1 pending application·279 citations·filing 1994–2011
94Inventor score
Top patents by PatentIndex Score
16 records- 0182US7327172B2Integrated clock generator with programmable spread spectrum using standard PLL circuitryLSI CORP·Filed 2005·Granted Feb 5, 2008·13 cites·20 claims
- 0276US7822121B2Method and/or apparatus for implementing global motion compensation in a video systemLSI CORP·Filed 2005·Granted Oct 26, 2010·6 cites·20 claims
- 0374US8204367B2DVD recorder and PVR instant on architectureLEUNG HO-MING·Filed 2011·Granted Jun 19, 2012·4 cites·20 claims
- 0474US5802339APipeline throughput via parallel out-of-order execution of adds and moves in a supplemental integer execution unitADVANCED MICRO DEVICES INC·Filed 1997·Granted Sep 1, 1998·56 cites·28 claims
- 0572US7899303B2DVD recorder and PVR instant on architectureLSI CORP·Filed 2006·Granted Mar 1, 2011·3 cites·20 claims
- 0667US5418736AOptimized binary adders and comparators for inputs having different widthsNEXGEN INC·Filed 1994·Granted May 23, 1995·37 cites·10 claims
- 0764US5923579AOptimized binary adder and comparator having an implicit constant for an inputADVANCED MICRO DEVICES INC·Filed 1995·Granted Jul 13, 1999·40 cites·3 claims
- 0864US5394351AOptimized binary adder and comparator having an implicit constant for an inputNEXGEN INC·Filed 1994·Granted Feb 28, 1995·35 cites·3 claims
- 0953US5919256AOperand cache addressed by the instruction address for reducing latency of read instructionADVANCED MICRO DEVICES INC·Filed 1996·Granted Jul 6, 1999·27 cites·31 claims
- 1048US5590351ASuperscalar execution unit for sequential instruction pointer updates and segment limit checksADVANCED MICRO DEVICES INC·Filed 1994·Granted Dec 31, 1996·20 cites·20 claims
- 1146US2008085124A1Clock generation with minimum number of crystals in a multimedia systemLSI LOGIC CORP·Filed 2006·Application pending·0 cites
- 1243US5675758AProcessor having primary integer execution unit and supplemental integer execution unit for performing out-of-order add and move operationsADVANCED MICRO DEVICES INC·Filed 1994·Granted Oct 7, 1997·11 cites·20 claims
- 1343US5517440AOptimized binary adders and comparators for inputs having different widthsNEXGEN INC·Filed 1995·Granted May 14, 1996·12 cites·10 claims
- 1438US5822786AApparatus and method for determining if an operand lies within an expand up or expand down segmentADVANCED MICRO DEVICES INC·Filed 1994·Granted Oct 13, 1998·10 cites·9 claims
- 1534US5699279AOptimized binary adders and comparators for inputs having different widthsADVANCED MICRO DEVICES INC·Filed 1996·Granted Dec 16, 1997·5 cites·13 claims
- 1630US6195745B1Pipeline throughput via parallel out-of-order execution of adds and moves in a supplemental integer execution unitADVANCED MICRO DEVICES INC·Filed 1998·Granted Feb 27, 2001·0 cites·35 claims
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