Inventor
MIKI KAZUHIKO
US23 patents
⚠️ This page may combine multiple inventors who share the name “MIKI KAZUHIKO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
13 patentsUS6927635B2Aug 9, 2005
Lock detectors having a narrow sensitivity range
IBM22 citations92
US7350095B2Mar 25, 2008
Digital circuit to measure and/or correct duty cycles
IBM9 citations84
US7245172B2Jul 17, 2007
Level shifter apparatus and method for minimizing duty cycle distortion
IBM13 citations84
US7225092B2May 29, 2007
Method and apparatus for measuring and adjusting the duty cycle of a high speed clock
IBM15 citations84
US7019572B2Mar 28, 2006
Systems and methods for initializing PLLs and measuring VCO characteristics
IBM9 citations74
US7176731B2Feb 13, 2007
Variation tolerant charge leakage correction circuit for phase locked loops
IBM9 citations71
US7917795B2Mar 29, 2011
Digital circuit to measure and/or correct duty cycles
IBM2 citations63
US7747892B2Jun 29, 2010
System for automatically selecting intermediate power supply voltages for intermediate level shifters
IBM3 citations63
US7265600B2Sep 4, 2007
Level shifter system and method to minimize duty cycle error due to voltage differences across power domains
IBM2 citations63
US7171318B2Jan 30, 2007
PLL filter leakage sensor
IBM2 citations63
US7061223B2Jun 13, 2006
PLL manufacturing test apparatus
IBM5 citations63
US7392419B2Jun 24, 2008
System and method automatically selecting intermediate power supply voltages for intermediate level shifters
IBM0 citations52
US7519498B2Apr 14, 2009
Thermal sensing method and apparatus using existing ESD devices
IBM0 citations42
TOSHIBA KK
6 patentsUS6021068AFeb 1, 2000
Nonvolatile semiconductor memory with read circuit using flip-flop type sense amplifier
TOSHIBA KK24 citations92
US5270978ADec 14, 1993
Nonvolatile memory circuit
TOSHIBA KK11 citations74
US7265634B2Sep 4, 2007
System and method for phase-locked loop initialization
TOSHIBA KK9 citations73
US7724056B2May 25, 2010
Semiconductor integrated circuit device operating in synchronism with clock and method for controlling duty of clock
TOSHIBA KK4 citations63
US7205853B2Apr 17, 2007
Method to configure phase-locked loop dividing ratio
TOSHIBA KK2 citations62
US5606524AFeb 25, 1997
Non-volatile semiconductor memory device capable of effecting high-speed operation with low voltage
TOSHIBA KK3 citations60