Inventor
KUNKEL STEVEN R
US24 patents
⚠️ This page may combine multiple inventors who share the name “KUNKEL STEVEN R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
16 patentsUS6988186B2Jan 17, 2006
Shared resource queue for simultaneous multithreading processing wherein entries allocated to different threads are capable of being interspersed among each other and a head pointer for one thread is capable of wrapping around its own tail in order to access a free entry
IBM70 citations98
US6105051AAug 15, 2000
Apparatus and method to guarantee forward progress in execution of threads in a multithreaded processor
IBM148 citations98
US7389388B2Jun 17, 2008
Data processing system and method for efficient communication utilizing an in coherency state
IBM29 citations92
US7716424B2May 11, 2010
Victim prefetching in a cache hierarchy
IBM33 citations91
US8370584B2Feb 5, 2013
Predictive ownership control of shared memory computing system data
IBM12 citations84
US6839816B2Jan 4, 2005
Shared cache line update mechanism
IBM19 citations84
US7360032B2Apr 15, 2008
Method, apparatus, and computer program product for a cache coherency protocol state that predicts locations of modified memory blocks
IBM9 citations82
US6922753B2Jul 26, 2005
Cache prefetching
IBM7 citations74
US6728842B2Apr 27, 2004
Cache updating in multiprocessor systems
IBM3 citations63
US8782646B2Jul 15, 2014
Non-uniform memory access (NUMA) enhancements for shared logical partitions
IBM2 citations62
US7194586B2Mar 20, 2007
Method and apparatus for implementing cache state as history of read/write shared data
IBM5 citations62
US7395376B2Jul 1, 2008
Method, apparatus, and computer program product for a cache coherency protocol state that predicts locations of shared memory blocks
IBM2 citations60
US7747826B2Jun 29, 2010
Data processing system and method for efficient communication utilizing an in coherency state
IBM0 citations52
US7047365B2May 16, 2006
Cache line purge and update instruction
IBM1 citations52
US7747825B2Jun 29, 2010
Method, apparatus, and computer program product for a cache coherency protocol state that predicts locations of shared memory blocks
IBM0 citations50
US7620776B2Nov 17, 2009
Method, apparatus, and computer program product for a cache coherency protocol state that predicts locations of modified memory blocks
IBM0 citations50
CANTIN JASON F
4 patentsUS8244988B2Aug 14, 2012
Predictive ownership control of shared memory computing system data
CANTIN JASON F48 citations97
US8397030B2Mar 12, 2013
Efficient region coherence protocol for clustered shared-memory multiprocessor systems
CANTIN JASON F7 citations84
US8112587B2Feb 7, 2012
Shared data prefetching with memory region cache line monitoring
CANTIN JASON F7 citations84
US8874853B2Oct 28, 2014
Local and global memory request predictor
CANTIN JASON F3 citations62
GLOBALFOUNDRIES INC
2 patentsUS9280465B2Mar 8, 2016
Techniques for moving checkpoint-based high-availability log and data directly from a producer cache to a consumer cache
GLOBALFOUNDRIES INC2 citations63
US9274952B2Mar 1, 2016
Moving checkpoint-based high-availability log and data directly from a producer cache to a consumer cache
GLOBALFOUNDRIES INC0 citations52