Inventor

TSENG HSIAO-HUI

TW54 patents

⚠️ This page may combine multiple inventors who share the name “TSENG HSIAO-HUI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TSENG HSIAO-HUI

TAIWAN SEMICONDUCTOR MFG CO LTD

Extra doped region for back-side deep trench isolation

Back side illuminated image sensor with reduced sidewall-induced leakage

Back-side deep trench isolation (BDTI) structure for pinned photodiode image sensor

Extra doped region for back-side deep trench isolation

Extra doped region for back-side deep trench isolation

Deep trench isolations and methods of forming the same

Deep trench isolation fabrication for BSI image sensor

Back side illuminated image sensor having isolated bonding pads

Back side illuminated image sensor with reduced sidewall-induced leakage

Method for manufacturing semiconductor image sensor device having deep trench isolation

Vertical gate field effect transistor

Semiconductor image sensor device with deep trench isolations and method for manufacturing the same

Extra doped region for back-side deep trench isolation

CMOS image sensor and method for forming the same

Method for forming alignment marks and structure of same

Flat pad structure for integrating complementary metal-oxide-semiconductor (CMOS) image sensor processes

Multi-layer trench capacitor structure

Extra doped region for back-side deep trench isolation

Semiconductor structure

Back side illuminated image sensor with reduced sidewall-induced leakage

Extra doped region for back-side deep trench isolation

Method for forming image sensor device structure with doping layer in light-sensing region

Method for forming alignment marks and structure of same

Vertical gate field effect transistor

Deep trench isolations and methods of forming the same

Vertical gate field effect transistor

Deep trench isolations and methods of forming the same

Semiconductor switching device separate by device isolation

High capacitance MIM device with self aligned spacer

Metal-insulator-metal device capacitance enhancement

Multi-layer trench capacitor structure

High capacitance MIM device with self aligned spacer

Semiconductor switching device separated by device isolation

Image sensor device structure with doping layer in light-sensing region

Semiconductor switching device separated by device isolation

Semiconductor switching device separated by device isolation

Deep trench isolation fabrication for BSI image sensor

Semiconductor switching device separated by device isolation

TAIWAN SEMICONDUCTOR MFG

Method and structure improving isolation between memory cell passing gate and capacitor

MIM process for logic-based embedded RAM

Approach to integrate salicide gate for embedded DRAM devices

Semiconductor switching device separated by device isolation

MIM process for logic-based embedded RAM having front end manufacturing operation

Method for forming alignment marks and structure of same

Pickup device structure within a device isolation region

WANG TZU-JUI

Image sensor with anti-reflection layer and method of manufacturing the same

TSAI SHUANG-JI

Back side illuminated image sensor having isolated bonding pads

TAIWAN SEMICONDUCTOR MANUFACTO

Method for improving bit line to capacitor electrical failures on DRAM circuits using a wet etch-back to improve the bit-line-to-capacitor overlay margins

TSENG HSIAO-HUI

Multiple gate dielectric structures and methods of forming the same

KAO MIN-FENG

CMOS image sensors and methods for forming the same