Inventor

PALACHARLA SUBBARAO

US21 patents

⚠️ This page may combine multiple inventors who share the name “PALACHARLA SUBBARAO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PALACHARLA SUBBARAO

QUALCOMM INC

Dynamic metadata relocation in memory

Method and apparatus for virtualized control of a shared system cache

Reducing latency in pseudo channel based memory systems

System and method for a shared cache with adaptive partitioning

Method and apparatus for flexible cache partitioning by sets and ways into component caches

System and method for managing bandwidth and power consumption through data filtering

Integrated circuits (IC) employing subsystem shared cache memory for facilitating extension of low-power island (LPI) memory and related methods

Method and apparatus for a shared cache with dynamic partitioning

Dram-aware caching

Reducing latency in pseudo channel based memory systems

Flexible dual ranks memory system to boost performance

Self-characterizing, evaluating, and adaptive high performance memory controller

Memory system with adaptive refresh

Metadata registers for a memory device

Reconfigurable shared memory systems, and related processor-based systems and methods

Physical address based set partitioning

Multiple-core memory controller

Multimedia compressed frame aware cache replacement policy

Rank interleaving for system meta mode operations in a dynamic random access memory (DRAM) memory device

CRAY RESEARCH INC

Stream buffers for high-performance computer memory system

KO KUNG-LING

Separate memories and address busses to store data and signature