Inventor

UPTON MICHAEL D

US22 patents

⚠️ This page may combine multiple inventors who share the name “UPTON MICHAEL D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

UPTON MICHAEL D

INTEL CORP

Method and apparatus for lock synchronization in a microprocessor system

Trace based instruction caching

Processor having execution core sections operating at different clock rates

Trace based instruction caching

Computer processor with a replay system having a plurality of checkers

Method and apparatus for assigning thread priority in a processor or the like

Determination of approaching instruction starvation of threads based on a plurality of conditions

Processor having execution core sections operating at different clock rates

Processor having execution core sections operating at different clock rates

Processor having replay architecture with fast and slow replay paths

Processing requests to efficiently access a limited bandwidth storage area

Determining whether thread fetch operation will be blocked due to processing of another thread

Processor having execution core sections operating at different clock rates

Method and apparatus for assigning thread priority in a processor or the like

Use of a context identifier in a cache memory

Processor having execution core sections operating at different clock rates

Method and apparatus for assigning thread priority in a processor or the like

Apparatus and method for efficient gather and scatter operations

CASCADE DESIGN AUTOMATION

Method and apparatus for designing the layout of a subcircuit in an integrated circuit

SAGER DAVID J

Processor having execution core sections operating at different clock rates

GROCHOWSKI EDWARD T

Generational thread scheduler using reservations for fair scheduling

BURNS DAVID W

Method and apparatus for assigning thread priority in a processor or the like