P

Inventor

DEAN ALVAR A

US25 patents
⚠️ This page may combine multiple inventors who share the name “DEAN ALVAR A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

23 patents
US6397170B1May 28, 2002

Simulation based power optimization

IBM110 citations98
US6604174B1Aug 5, 2003

Performance based system and method for dynamic allocation of a unified multiport cache

IBM82 citations96
US6792582B1Sep 14, 2004

Concurrent logical and physical construction of voltage islands for mixed supply voltage designs

IBM65 citations95
US6532520B1Mar 11, 2003

Method and apparatus for allocating data and instructions within a shared cache

IBM62 citations95
US6609228B1Aug 19, 2003

Latch clustering for power optimization

IBM59 citations94
US6687883B2Feb 3, 2004

System and method for inserting leakage reduction control in logic circuits

IBM46 citations93
US6097241AAug 1, 2000

ASIC low power activity detector to change threshold voltage

IBM50 citations93
US7350108B1Mar 25, 2008

Test system for integrated circuits

IBM23 citations92
US6802033B1Oct 5, 2004

Low-power critical error rate communications controller

IBM42 citations92
US6487701B1Nov 26, 2002

System and method for AC performance tuning by thereshold voltage shifting in tubbed semiconductor technology

IBM27 citations92
US6317840B1Nov 13, 2001

Control of multiple equivalent functional units for power reduction

IBM50 citations92
US6237132B1May 22, 2001

Toggle based application specific core methodology

IBM33 citations92
US6011383AJan 4, 2000

Low powering apparatus for automatic reduction of power in active and standby modes

IBM19 citations92
US6535016B2Mar 18, 2003

Method and circuit for providing copy protection in an application-specific integrated circuit

IBM37 citations91
US6246254B1Jun 12, 2001

Method and circuit for providing copy protection in an application-specific integrated circuit

IBM38 citations91
US6711719B2Mar 23, 2004

Method and apparatus for reducing power consumption in VLSI circuit designs

IBM41 citations90
US6636995B1Oct 21, 2003

Method of automatic latch insertion for testing application specific integrated circuits

IBM17 citations84
US7478280B2Jan 13, 2009

Test system for integrated circuits

IBM3 citations63
US6275968B1Aug 14, 2001

Apparatus and method to reduce node toggling in semiconductor devices

IBM6 citations63
US6985004B2Jan 10, 2006

Wiring optimizations for power

IBM2 citations61
US4945509AJul 31, 1990

Dual look ahead mask generator

IBM6 citations59
US7469395B2Dec 23, 2008

Wiring optimizations for power

IBM0 citations51
US7346875B2Mar 18, 2008

Wiring optimizations for power

IBM0 citations51

CISCO TECH INC

1 patent

CHAPMAN JOHN T

1 patent