Inventor
MONTOYE ROBERT KEVIN
US31 patents
⚠️ This page may combine multiple inventors who share the name “MONTOYE ROBERT KEVIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
25 patentsUS6507115B2Jan 14, 2003
Multi-chip integrated circuit module
IBM312 citations99
US8020073B2Sep 13, 2011
Dynamic memory architecture employing passive expiration of data
IBM99 citations98
US7290203B2Oct 30, 2007
Dynamic memory architecture employing passive expiration of data
IBM101 citations98
US6262885B1Jul 17, 2001
Portable computing device having a display movable thereabout
IBM149 citations98
US6199126B1Mar 6, 2001
Processor transparent on-the-fly instruction stream decompression
IBM85 citations97
US7421566B2Sep 2, 2008
Implementing instruction set architectures with non-contiguous register file specifiers
IBM38 citations96
US6326696B1Dec 4, 2001
Electronic package with interconnected chips
IBM107 citations96
US7793081B2Sep 7, 2010
Implementing instruction set architectures with non-contiguous register file specifiers
IBM34 citations93
US7106620B2Sep 12, 2006
Memory cell having improved read stability
IBM32 citations93
US6650145B2Nov 18, 2003
Circuits and systems for limited switch dynamic logic
IBM47 citations92
US6618506B1Sep 9, 2003
Method and apparatus for improved compression and decompression
IBM34 citations92
US6306686B1Oct 23, 2001
Method of fabricating an electronic package with interconnected chips
IBM22 citations89
US7349288B1Mar 25, 2008
Ultra high-speed Nor-type LSDL/Domino combined address decoder
IBM12 citations84
US7014122B2Mar 21, 2006
Method and apparatus for performing bit-aligned permute
IBM11 citations84
US7282960B2Oct 16, 2007
Dynamic logical circuit having a pre-charge element separately controlled by a voltage-asymmetric clock
IBM11 citations82
US6537852B2Mar 25, 2003
Spacer - connector stud for stacked surface laminated multichip modules and methods of manufacture
IBM13 citations79
US6891399B2May 10, 2005
Variable pulse width and pulse separation clock generator
IBM11 citations74
US5745058AApr 28, 1998
Method and system for compressing microcode to be executed within a data processing system
IBM11 citations73
US10042876B2Aug 7, 2018
Sort-merge-join on a large architected register file
IBM4 citations72
US7461209B2Dec 2, 2008
Transient cache storage with discard function for disposable data
IBM6 citations63
US7337202B2Feb 26, 2008
Shift-and-negate unit within a fused multiply-adder circuit
IBM4 citations63
US6573758B2Jun 3, 2003
Fast, symmetrical XOR/XNOR gate
IBM6 citations63
US7047468B2May 16, 2006
Method and apparatus for low overhead circuit scan
IBM5 citations62
US7383480B2Jun 3, 2008
Scanning latches using selecting array
IBM6 citations61
US6667555B2Dec 23, 2003
Spacer-connector stud for stacked surface laminated multi-chip modules and methods of manufacture
IBM3 citations58
GSCHWIND MICHAEL KARL
4 patentsUS8166281B2Apr 24, 2012
Implementing instruction set architectures with non-contiguous register file specifiers
GSCHWIND MICHAEL KARL30 citations92
US8893095B2Nov 18, 2014
Methods for generating code for an architecture encoding an extended register specification
GSCHWIND MICHAEL KARL7 citations84
US8893079B2Nov 18, 2014
Methods for generating code for an architecture encoding an extended register specification
GSCHWIND MICHAEL KARL1 citations63
US8312424B2Nov 13, 2012
Methods for generating code for an architecture encoding an extended register specification
GSCHWIND MICHAEL KARL4 citations63