Inventor

SINHA JAYDEEP K

US9 patents

⚠️ This page may combine multiple inventors who share the name “SINHA JAYDEEP K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KLA TENCOR CORP

2 patents

US10249523B2Apr 2, 2019

Overlay and semiconductor process control using a wafer geometry metric

KLA TENCOR CORP3 citations71

US11761880B2Sep 19, 2023

Process-induced distortion prediction and feedforward and feedback correction of overlay errors

KLA TENCOR CORP0 citations62

CHEN HAIGUANG

2 patents

US10330608B2Jun 25, 2019

Systems and methods for wafer surface feature detection, classification and quantification with wafer geometry metrology tools

CHEN HAIGUANG1 citations60

US9031810B2May 12, 2015

Methods and systems of object based metrology for advanced wafer surface nanotopography

CHEN HAIGUANG3 citations60

VUKKADALA PRADEEP

1 patent

US9354526B2May 31, 2016

Overlay and semiconductor process control using a wafer geometry metric

VUKKADALA PRADEEP15 citations79

KLA TENCOR TECH CORP

1 patent

US7324917B2Jan 29, 2008

Method, system, and software for evaluating characteristics of a surface with reference to its edge

KLA TENCOR TECH CORP13 citations76

VEERARAGHAVAN SATHISH

1 patent

US8065109B2Nov 22, 2011

Localized substrate geometry characterization

VEERARAGHAVAN SATHISH5 citations57

ADE CORP

1 patent

US7175214B2Feb 13, 2007

Wafer gripping fingers to minimize distortion

ADE CORP0 citations44

MACNAUGHTON CRAIG W

1 patent

US9588441B2Mar 7, 2017

Method and device for using substrate geometry to determine optimum substrate analysis sampling

MACNAUGHTON CRAIG W1 citations35