Inventor
RAO RAGHAVENDAR M
US22 patents
⚠️ This page may combine multiple inventors who share the name “RAO RAGHAVENDAR M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
9 patentsUS9112529B1Aug 18, 2015
Method and system for forward error correction of interleaved-formated data
XILINX INC26 citations92
US8959418B1Feb 17, 2015
Forward error correction
XILINX INC34 citations92
US9287899B1Mar 15, 2016
Forward error correction
XILINX INC7 citations82
US9203440B1Dec 1, 2015
Matrix expansion
XILINX INC10 citations82
US9083383B1Jul 14, 2015
Parity check matrix
XILINX INC14 citations82
US9009577B1Apr 14, 2015
Circuitry and method for forward error correction
XILINX INC4 citations72
US7965799B2Jun 21, 2011
Block boundary detection for a wireless communication system
XILINX INC2 citations63
US9047241B2Jun 2, 2015
Minimum mean square error processing
XILINX INC1 citations62
US9047240B2Jun 2, 2015
Minimum mean square error processing
XILINX INC0 citations51
RAO RAGHAVENDAR M
7 patentsUS8417758B1Apr 9, 2013
Left and right matrix multiplication using a systolic array
RAO RAGHAVENDAR M39 citations94
US8406334B1Mar 26, 2013
Overflow resistant, fixed precision, bit optimized systolic array for QR decomposition and MIMO decoding
RAO RAGHAVENDAR M20 citations92
US8510364B1Aug 13, 2013
Systolic array for matrix triangularization and back-substitution
RAO RAGHAVENDAR M13 citations84
US8473540B1Jun 25, 2013
Decoder and process therefor
RAO RAGHAVENDAR M11 citations84
US8473539B1Jun 25, 2013
Modified givens rotation for matrices with complex numbers
RAO RAGHAVENDAR M12 citations84
US8443031B1May 14, 2013
Systolic array for cholesky decomposition
RAO RAGHAVENDAR M15 citations83
US8831117B2Sep 9, 2014
Peak-to-average power ratio reduction with bounded error vector magnitude
RAO RAGHAVENDAR M6 citations73