P

Inventor

MEKKAT VINEETH

US13 patents

Patents

13 patents
US10915320B2Feb 9, 2021

Shift-folding for efficient load coalescing in a binary translation based processor

INTEL CORP0 citations60
US12216581B2Feb 4, 2025

System, method, and apparatus for enhanced pointer identification and prefetching

INTEL CORP0 citations58
US11693780B2Jul 4, 2023

System, method, and apparatus for enhanced pointer identification and prefetching

INTEL CORP0 citations58
US11080194B2Aug 3, 2021

System, method, and apparatus for enhanced pointer identification and prefetching

INTEL CORP0 citations58
US10540178B2Jan 21, 2020

Eliminating redundant stores using a protection designator and a clear designator

INTEL CORP0 citations51
US10120686B2Nov 6, 2018

Eliminating redundant store instructions from execution while maintaining total store order

INTEL CORP0 citations51
US9996356B2Jun 12, 2018

Method and apparatus for recovering from bad store-to-load forwarding in an out-of-order processor

INTEL CORP0 citations50
US9710389B2Jul 18, 2017

Method and apparatus for memory aliasing detection in an out-of-order instruction execution platform

INTEL CORP0 citations49
US10235177B2Mar 19, 2019

Register reclamation

INTEL CORP0 citations45
US10853078B2Dec 1, 2020

Method and apparatus for supporting speculative memory optimizations

INTEL CORP0 citations43
US10296343B2May 21, 2019

Hybrid atomicity support for a binary translation based microprocessor

INTEL CORP0 citations40
US9916164B2Mar 13, 2018

Methods and apparatus to optimize instructions for execution by a processor

INTEL CORP0 citations39
US10228956B2Mar 12, 2019

Supporting binary translation alias detection in an out-of-order processor

INTEL CORP0 citations37