Inventor

WANG CHUNG-LI

US48 patents

⚠️ This page may combine multiple inventors who share the name “WANG CHUNG-LI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WANG CHUNG-LI

LSI CORP

Low density parity check decoder with dynamic scaling

Irregular low density parity check decoder with low syndrome error handling

Systems and methods for skip layer data decoding

Non-binary layered low density parity check decoder

Shift register-based layered low density parity check decoder

Min-sum based hybrid non-binary low density parity check decoder

Low density parity check layer decoder for codes with overlapped circulants

Systems and methods for multi-stage encoding of concatenated low density parity check codes

Systems and methods for shared layer data decoding

Hardware architecture and implementation of low power layered multi-level LDPC decoder

Systems and methods for reusing a layered decoder to yield a non-layered result

Modified targeted symbol flipping for non-binary LDPC codes

Systems and methods for hybrid layer data decoding

Systems and methods for trapping set disruption

System and method for check-node unit message processing

Memory architecture for layered low-density parity-check decoder

LI ZONGWANG

Non-binary LDPC decoder with low latency scheduling

Systems and methods for multi-level quasi-cyclic low density parity check codes

Systems and methods for combined binary and non-binary data processing

Optimized mechanism to simplify the circulant shifter and the P/Q kick out for layered LDPC decoder

Systems and methods for reduced power multi-layer data decoding

Systems and methods for reduced format non-binary decoding

Systems and methods for non-binary decoding

SK HYNIX INC

Techniques for adaptive LDPC decoding

Cyclically interleaved XOR array for error recovery

Reliability-assisted bit-flipping decoding algorithm

Efficient encoder based on modified RU algorithm

Encoder by-pass with scrambler

WANG CHUNG-LI

Multi-level LDPC layered decoder with out-of-order processing

LDPC decoder with targeted symbol flipping

Min-sum based non-binary LDPC decoder

Multi-level LDPC layer decoder

Data processing system with failure recovery

ZHANG FAN

Systems and methods for mis-correction correction in a data processing system

Systems and methods for dual binary and non-binary decoding processing

Systems and methods for compression driven variable rate decoding in a data processing system

Systems and methods for local iteration randomization in a data decoder

Systems and methods for gate aware iterative data processing

YANG SHAOHUA

Systems and methods for locating and correcting decoder mis-corrections

Systems and methods for back step data decoding

Systems and methods for non-binary decoding biasing control

Systems and methods for power measurement in a data processing system

NYQUIST SEMICONDUCTOR LTD

Systems and methods for decoding error correcting codes

Systems and methods for decoding error correcting codes

Systems and methods for decoding error correcting codes

INNOGRIT TECHNOLOGIES CO LTD

Systems and methods for decoding error correcting codes with self-generated LLR

Systems and methods for decoding error correcting codes

SK HYNIX MEMORY SOLUTIONS INC

One-shot decoder for two-error-correcting BCH codes