Inventor

ILGENSTEIN KERRY A

US14 patents

⚠️ This page may combine multiple inventors who share the name “ILGENSTEIN KERRY A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ADVANCED MICRO DEVICES INC

9 patents

US5489857AFeb 6, 1996

Flexible synchronous/asynchronous cell structure for a high density programmable logic device

ADVANCED MICRO DEVICES INC159 citations99

US5485104AJan 16, 1996

Logic allocator for a programmable logic device

ADVANCED MICRO DEVICES INC159 citations99

US5015884AMay 14, 1991

Multiple array high performance programmable logic device family

ADVANCED MICRO DEVICES INC153 citations97

US4963768AOct 16, 1990

Flexible, programmable cell array interconnected by a programmable switch matrix

ADVANCED MICRO DEVICES INC116 citations96

US5869981AFeb 9, 1999

High density programmable logic device

ADVANCED MICRO DEVICES INC63 citations95

US5225719AJul 6, 1993

Family of multiple segmented programmable logic blocks interconnected by a high speed centralized switch matrix

ADVANCED MICRO DEVICES INC72 citations95

US5457409AOct 10, 1995

Architecture of a multiple array high density programmable logic device with a plurality of programmable switch matrices

ADVANCED MICRO DEVICES INC40 citations92

US6028446AFeb 22, 2000

Flexible synchronous and asynchronous circuits for a very high density programmable logic device

ADVANCED MICRO DEVICES INC9 citations74

US5811986ASep 22, 1998

Flexible synchronous/asynchronous cell structure for a high density programmable logic device

ADVANCED MICRO DEVICES INC12 citations74

LATTICE SEMICONDUCTOR CORP

3 patents

US6348813B1Feb 19, 2002

Scalable architecture for high density CPLD's having two-level hierarchy of routing resources

LATTICE SEMICONDUCTOR CORP192 citations97

US6184713B1Feb 6, 2001

Scalable architecture for high density CPLDS having two-level hierarchy of routing resources

LATTICE SEMICONDUCTOR CORP195 citations97

US6150841ANov 21, 2000

Enhanced macrocell module for high density CPLD architectures

LATTICE SEMICONDUCTOR CORP40 citations91

CHOY JON S

1 patent

US8823445B2Sep 2, 2014

Systems and methods for controlling power in semiconductor circuits

CHOY JON S5 citations72

FREESCALE SEMICONDUCTOR INC

1 patent

US9300296B2Mar 29, 2016

Level shifter circuit

FREESCALE SEMICONDUCTOR INC2 citations61

ILGENSTEIN KERRY A

ADVANCED MICRO DEVICES INC

Flexible synchronous/asynchronous cell structure for a high density programmable logic device

Logic allocator for a programmable logic device

Multiple array high performance programmable logic device family

Flexible, programmable cell array interconnected by a programmable switch matrix

High density programmable logic device

Family of multiple segmented programmable logic blocks interconnected by a high speed centralized switch matrix

Architecture of a multiple array high density programmable logic device with a plurality of programmable switch matrices

Flexible synchronous and asynchronous circuits for a very high density programmable logic device

Flexible synchronous/asynchronous cell structure for a high density programmable logic device

LATTICE SEMICONDUCTOR CORP

Scalable architecture for high density CPLD&#39;s having two-level hierarchy of routing resources

Scalable architecture for high density CPLDS having two-level hierarchy of routing resources

Enhanced macrocell module for high density CPLD architectures

CHOY JON S

Systems and methods for controlling power in semiconductor circuits

FREESCALE SEMICONDUCTOR INC

Level shifter circuit

Scalable architecture for high density CPLD's having two-level hierarchy of routing resources