P

Inventor

NGO HUNG CAI

US45 patents
⚠️ This page may combine multiple inventors who share the name “NGO HUNG CAI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

41 patents
US7551508B2Jun 23, 2009

Energy efficient storage device using per-element selectable power supply voltages

IBM19 citations93
US7408829B2Aug 5, 2008

Methods and arrangements for enhancing power management systems in integrated circuits

IBM32 citations93
US7088154B2Aug 8, 2006

Methods and arrangements for a low power phase-locked loop

IBM19 citations93
US6943599B2Sep 13, 2005

Methods and arrangements for a low power phase-locked loop

IBM28 citations93
US6404235B1Jun 11, 2002

System and method for reducing latency in a dynamic circuit

IBM23 citations93
US6393446B1May 21, 2002

32-bit and 64-bit dual mode rotator

IBM19 citations93
US6292027B1Sep 18, 2001

Fast low-power logic gates and method for evaluating logic signals

IBM22 citations93
US6175852B1Jan 16, 2001

High-speed binary adder

IBM24 citations93
US5964827AOct 12, 1999

High-speed binary adder

IBM23 citations93
US7349271B2Mar 25, 2008

Cascaded test circuit with inter-bitline drive devices for evaluating memory cell performance

IBM21 citations92
US6650145B2Nov 18, 2003

Circuits and systems for limited switch dynamic logic

IBM47 citations92
US6529084B1Mar 4, 2003

Interleaved feedforward VCO and PLL

IBM23 citations92
US6501313B2Dec 31, 2002

Dynamic duty cycle adjuster

IBM48 citations92
US6335900B1Jan 1, 2002

Method and apparatus for selectable wordline boosting in a memory device

IBM20 citations92
US7414904B2Aug 19, 2008

Method for evaluating storage cell design using a wordline timing and cell access detection circuit

IBM22 citations91
US6763474B1Jul 13, 2004

System for synchronizing nodes in a heterogeneous computer system by using multistage frequency synthesizer to dynamically adjust clock frequency of the nodes

IBM35 citations91
US7995418B2Aug 9, 2011

Method and computer program for controlling a storage device having per-element selectable power supply voltages

IBM10 citations84
US7952422B2May 31, 2011

Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices

IBM11 citations84
US7733720B2Jun 8, 2010

Method and system for determining element voltage selection control values for a storage device

IBM15 citations84
US6819141B1Nov 16, 2004

High speed, static digital multiplexer

IBM13 citations84
US6285218B1Sep 4, 2001

Method and apparatus for implementing logic using mask-programmable dynamic logic gates

IBM15 citations84
US6282557B1Aug 28, 2001

Low latency fused multiply-adder

IBM19 citations84
US7545690B2Jun 9, 2009

Method for evaluating memory cell performance

IBM9 citations83
US6566921B1May 20, 2003

Apparatus and method for high resolution frequency adjustment in a multistage frequency synthesizer

IBM19 citations83
US6522207B1Feb 18, 2003

Apparatus and method for dynamic frequency adjustment in a frequency synthesizer

IBM17 citations83
US7202705B2Apr 10, 2007

Dynamic logic circuit apparatus and method for reducing leakage power consumption via separate clock and output stage control

IBM11 citations82
US7272624B2Sep 18, 2007

Fused booth encoder multiplexer

IBM7 citations74
US6891399B2May 10, 2005

Variable pulse width and pulse separation clock generator

IBM11 citations74
US6345286B1Feb 5, 2002

6-to-3 carry-save adder

IBM9 citations74
US6178437B1Jan 23, 2001

Method and apparatus for anticipating leading digits and normalization shift amounts in a floating-point processor

IBM10 citations74
US5757682AMay 26, 1998

Parallel calculation of exponent and sticky bit during normalization

IBM7 citations72
US5742535AApr 21, 1998

Parallel calculation of exponent and sticky bit during normalization

IBM5 citations72
US7835212B2Nov 16, 2010

Methods and arrangements for enhancing power management systems in integrated circuits

IBM2 citations63
US7142015B2Nov 28, 2006

Fast turn-off circuit for controlling leakage

IBM6 citations63
US6335650B1Jan 1, 2002

Method and apparatus for adjusting time delays in circuits with multiple operating supply voltages

IBM5 citations63
US6710668B1Mar 23, 2004

Glitchless wide-range oscillator, and method therefor

IBM5 citations62
US6407574B1Jun 18, 2002

Method and system for utilizing hostile-switching neighbors to improve interconnect speed for high performance processors

IBM3 citations62
US7193446B2Mar 20, 2007

Dynamic logic circuit incorporating reduced leakage state-retaining devices

IBM4 citations61
US6360238B1Mar 19, 2002

Leading zero/one anticipator having an integrated sign selector

IBM6 citations61
US5742536AApr 21, 1998

Parallel calculation of exponent and sticky bit during normalization

IBM2 citations61
US6232872B1May 15, 2001

Comparator

IBM0 citations52

BELLUOMINI WENDY ANN

2 patents

JOSHI RAJIV V

1 patent

CHUANG CHING-TE KENT

1 patent