Inventor

SCHULTE MICHAEL J

US33 patents

⚠️ This page may combine multiple inventors who share the name “SCHULTE MICHAEL J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SCHULTE MICHAEL J

ADVANCED MICRO DEVICES INC

Die-stacked memory device with reconfigurable logic

Die-stacked memory device with reconfigurable logic

Division with rectangular multiplier supporting multiple precisions and operand types

Power control for multi-core data processor

Computation memory operations in a logic layer of a stacked memory

Flexible, scalable graph-processing accelerator

Predicting power management state duration on a per-process basis and modifying cache size based on the predicted duration

Idle phase exit prediction

Processing engine for complex atomic operations

Flexible, scalable graph-processing accelerator

Multi-die system performance optimization

Write endurance management techniques in the logic layer of a stacked memory

Configuring idle states for entities in a computing device based on predictions of durations of idle periods

Using a linear prediction to configure an idle state of an entity in a computing device

HOKENEK ERDEM

Multithreaded processor with multiple concurrent pipelines per thread

Multithreaded processor with multiple concurrent pipelines per thread

Multithreaded processor with multiple concurrent pipelines per thread

Multithreaded processor with multiple concurrent pipelines per thread

Multithreaded processor with multiple concurrent pipelines per thread

SANDBRIDGE TECHNOLOGIES INC

Processor having parallel vector multiply and reduce operations with sequential semantics

Multi-threaded processor having compound instruction and operation formats

Arithmetic unit for addition or subtraction with preliminary saturation detection

Processor reduction unit for accumulation of multiple operands with or without saturation

WISCONSIN ALUMNI RES FOUND

Processing unit having decimal floating-point divider using Newton-Raphson iteration

Decimal floating-point adder

Processing unit having multioperand decimal addition

LOH GABRIEL H

Die-stacked memory device providing data translation

Cache coherency using die-stacked memory device with logic die

ARORA MANISH

Distributed computing with phase change material thermal management

Stacked semiconductor chip device with phase change material

MIPS TECH INC

System and method for improving the accuracy of reciprocal square root operations performed by a floating-point unit

KENNAMETAL INC

Indexable tangential railway wheel milling inserts and cutting tool holders

KIM NAM SUNG

Method and apparatus for power reduction during lane divergence