Inventor

WEBER LARREN G

US26 patents

⚠️ This page may combine multiple inventors who share the name “WEBER LARREN G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WEBER LARREN G

MICRON TECHNOLOGY INC

Method for circuits connection for wafer level burning and testing of individual dies on semiconductor wafer

Semiconductor array having built-in test circuit for wafer level testing

Built-in test circuit connection for wafer level burnin and testing of individual dies

Apparatuses and methods for power efficient driver circuits

Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges

Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges

Method for buffering an input signal

Buffer with fast edge propagation

Buffer with fast edge propagation

Timing and control circuit for a static RAM responsive to an address transition pulse

Method and apparatus for accessing one of a plurality of memory units within an electronic memory device

Skewed nor and nand rising logic devices for rapidly propagating a rising edge of an output signal

Upward and downward pulse stretcher circuits and modules

Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges, circuits and systems including same

Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges

Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges and systems including same

Method and apparatus for registering free flow information

Relaxed write timing for a memory device

Apparatuses and methods for power efficient driver circuits

Apparatuses and methods for power efficient driver circuits

High speed, low power CMOS logic gate

Method for rapidly propagating a fast edge of an output signal through a skewed logic device

Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges

Skewed falling logic device for rapidly propagating a falling edge of an output signal

Relaxed write timing for a memory device

(unassigned)

Fixture for burn-in testing of semiconductor wafers, and a semiconductor wafer