Inventor

HUANG TSAI-YU

TW33 patents

⚠️ This page may combine multiple inventors who share the name “HUANG TSAI-YU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HUANG TSAI-YU

TAIWAN SEMICONDUCTOR MFG CO LTD

Ambient controlled two-step thermal treatment for spin-on coating layer planarization

Methods of forming alignment structure with trenches for semiconductor devices

Method for manufacturing semiconductor device with semiconductor capping layer

Method for manufacturing semiconductor device

Interface trap charge density reduction

Semiconductor structure and method for forming the same

Semiconductor device and method

Nanostructure FET and method of forming same

Ambient controlled two-step thermal treatment for spin-on coating layer planarization

Methods for forming isolation regions by depositing and oxidizing a silicon liner

Method for forming semiconductor device with monoclinic crystalline metal oxide capping layer

MICRON TECHNOLOGY INC

Methods of forming capacitors and semiconductor devices including a rutile titanium dioxide material

Constructions comprising thermally conductive stacks containing rutile-type titanium oxide

Methods of forming rutile titanium dioxide

Constructions comprising rutile-type titanium oxide; and methods of forming and utilizing rutile-type titanium oxide

Methods of forming capacitors and semiconductor devices including a rutile titanium dioxide material

Methods of forming capacitors and semiconductor devices including a rutile titanium dioxide material

HUANG TSAI-YU

Three-dimensional integrated circuits and fabrication thereof

Capacitors including a rutile titanium dioxide material and semiconductor devices incorporating same

High-k dielectric material and methods of forming the high-k dielectric material

Three dimensional stacked structure for chips

Methods of forming rutile titanium dioxide and associated methods of forming semiconductor structures

UNITED MICROELECTRONICS CORP

Active region structure and forming method thereof

Test key layout and method of monitoring pattern misalignments using test keys

Antifuse device and method of operating the same

Memory cell with a read selection transistor and a program selection transistor

NANYA TECHNOLOGY CORP

Split gate flash memory and formation method thereof

Split gate flash memory and formation method thereof

Method of etching a mask layer and a protecting layer for metal contact windows

POWERCHIP SEMICONDUCTOR CORP

Split gate flash memory cell and manufacturing method thereof

Split gate flash memory cell

HUANG TSAI YU

Integrated circuit device having through via and method for preparing the same

MIRIN NIK

Methods of forming and utilizing rutile-type titanium oxide