Inventor

ZUO JIANG-KAI

US103 patents

⚠️ This page may combine multiple inventors who share the name “ZUO JIANG-KAI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ZUO JIANG-KAI

FREESCALE SEMICONDUCTOR INC

LDMOS device and method

Dual gate LDMOS device fabrication methods

Partial, self-biased isolation in semiconductor devices

Semiconductor devices and related fabrication methods

Diodes with multiple junctions

LDMOS device with high-potential-biased isolation ring

Schottky diode

Dual gate lateral diffused MOS transistor

Antifuse element and electrically redundant antifuse array for controlled rupture location

Magnetic tunnel junction current sensors

Dual gate LDMOS devices

Microelectronic assembly with improved isolation voltage performance and a method for forming the same

Antifuses with curved breakdown regions

Methods for forming cascode current mirrors

Semiconductor devices and method of fabrication

Semiconductor device and method of making

Partially biased isolation in semiconductor devices

Self-adjusted isolation bias in semiconductor devices

Deep trench isolation

Deep trench isolation

Die edge sealing structures and related fabrication methods

Microelectronic assemblies with improved isolation voltage performance

Antifuse element and method of manufacture

Composite capacitor and method for forming the same

YANG HONGNING

Semiconductor device with self-biased isolation

Semiconductor devices and related fabrication methods

Semiconductor device with enhanced 3D resurf

High breakdown voltage LDMOS device

Drain-end drift diminution in semiconductor devices

Semiconductor device with drain-end drift diminution

Partially depleted dielectric resurf LDMOS

Near zero channel length field drift LDMOS

LDMOS transistors with a split gate

Composite semiconductor device with multiple threshold voltages

High breakdown voltage LDMOS device

Semiconductor device with peripheral breakdown protection

Semiconductor device with self-biased isolation

Methods for producing near zero channel length field drift LDMOS

NXP USA INC

Semiconductor device and method of making

Semiconductor device isolation via depleted coupling layer

Alternating source region arrangement

Electro-static discharge protection device and method of making

Semiconductor device isolation with RESURF layer arrangement

LIN XIN

Bipolar transistor

Zener diode with reduced substrate current

Bipolar transistor

MIN WON GI

Laterally diffused metal oxide semiconductor (LDMOS) device with multiple gates and doped regions

Composite semiconductor device with different channel widths

ZHANG ZHIHONG

Semiconductor device with composite drift region and related fabrication method

CHENG XU

Deep trench isolation structures and systems and methods including the same