Inventor
NARENDRA TRIVEDI ALPA T
US22 patents
⚠️ This page may combine multiple inventors who share the name “NARENDRA TRIVEDI ALPA T”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
16 patentsUS9990249B2Jun 5, 2018
Memory integrity with error detection and correction
INTEL CORP41 citations94
US9652609B2May 16, 2017
Entry/exit architecture for protected device modules
INTEL CORP24 citations94
US9614666B2Apr 4, 2017
Encryption interface
INTEL CORP19 citations92
US10387305B2Aug 20, 2019
Techniques for compression memory coloring
INTEL CORP18 citations85
US9307409B2Apr 5, 2016
Apparatus, system and method of protecting domains of a multimode wireless radio transceiver
INTEL CORP7 citations81
US10706143B2Jul 7, 2020
Techniques for secure-chip memory for trusted execution environments
INTEL CORP3 citations73
US10536274B2Jan 14, 2020
Cryptographic protection for trusted operating systems
INTEL CORP2 citations73
US9910793B2Mar 6, 2018
Memory encryption engine integration
INTEL CORP2 citations71
US9087202B2Jul 21, 2015
Entry/exit architecture for protected device modules
INTEL CORP3 citations63
US12341870B2Jun 24, 2025
Encryption interface
INTEL CORP0 citations62
US11316661B2Apr 26, 2022
Encryption interface
INTEL CORP0 citations62
US10530568B2Jan 7, 2020
Encryption interface
INTEL CORP0 citations52
US10068068B2Sep 4, 2018
Trusted timer service
INTEL CORP1 citations52
US10235304B2Mar 19, 2019
Multi-crypto-color-group VM/enclave memory integrity method and apparatus
INTEL CORP0 citations48
US10592435B2Mar 17, 2020
System, apparatus and method for secure monotonic counter operations in a processor
INTEL CORP0 citations42
US9442864B2Sep 13, 2016
Bridging circuitry between a memory controller and request agents in a system having multiple system memory protection schemes
INTEL CORP0 citations39
CHHABRA SIDDHARTHA
4 patentsUS8819455B2Aug 26, 2014
Parallelized counter tree walk for low overhead memory replay protection
CHHABRA SIDDHARTHA25 citations92
US9053346B2Jun 9, 2015
Low-overhead cryptographic method and apparatus for providing memory confidentiality, integrity and replay protection
CHHABRA SIDDHARTHA6 citations72
US10223298B2Mar 5, 2019
Urgency based reordering for priority order servicing of memory requests
CHHABRA SIDDHARTHA2 citations67
US9524249B2Dec 20, 2016
Memory encryption engine integration
CHHABRA SIDDHARTHA2 citations60