Inventor
GINOSAR RAN
IL25 patents
⚠️ This page may combine multiple inventors who share the name “GINOSAR RAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
10 patentsUS7098899B1Aug 29, 2006
Dual form low power, instant on and high performance, non-instant on computing device
INTEL CORP38 citations92
US6314553B1Nov 6, 2001
Circuit synthesis and verification using relative timing
INTEL CORP29 citations92
US7239615B2Jul 3, 2007
Multiple wireless communication protocol methods and apparatuses
INTEL CORP25 citations91
US5948096ASep 7, 1999
Apparatus and method for self-timed marking of variable length instructions having length-affecting prefix bytes
INTEL CORP36 citations91
US5931944AAug 3, 1999
Branch instruction handling in a self-timed marking system
INTEL CORP49 citations91
US6891857B1May 10, 2005
Multiple wireless communication protocol methods and apparatuses including proactive reduction of interference
INTEL CORP38 citations89
US5978899ANov 2, 1999
Apparatus and method for parallel processing and self-timed serial marking of variable length instructions
INTEL CORP18 citations82
US6931474B1Aug 16, 2005
Dual-function computing system having instant-on mode of operation
INTEL CORP10 citations74
US5941982AAug 24, 1999
Efficient self-timed marking of lengthy variable length instructions
INTEL CORP13 citations72
US7096309B2Aug 22, 2006
Computing device capable of instant-on and non-instant on modes of operation
INTEL CORP5 citations63
TECHNION RES & DEV FOUNDATION
6 patentsUS5812993ASep 22, 1998
Digital hardware architecture for realizing neural network
TECHNION RES & DEV FOUNDATION112 citations92
US5467123ANov 14, 1995
Apparatus & method for enhancing color images
TECHNION RES & DEV FOUNDATION27 citations89
US7554475B2Jun 30, 2009
Low-power inverted ladder digital-to-analog converter
TECHNION RES & DEV FOUNDATION7 citations71
US10366752B2Jul 30, 2019
Programming for electronic memories
TECHNION RES & DEV FOUNDATION3 citations69
US10878906B2Dec 29, 2020
Resistive address decoder and virtually addressed memory
TECHNION RES & DEV FOUNDATION0 citations51
US10025896B2Jul 17, 2018
Exploiting the scan test interface for reverse engineering of a VLSI device
TECHNION RES & DEV FOUNDATION0 citations40
SIGHT INC I
2 patentsGINOSAR RAN
2 patentsUS8090674B2Jan 3, 2012
Integrated system and method for multichannel neuronal recording with spike/LFP separation, integrated A/D conversion and threshold detection
GINOSAR RAN7 citations80
US9449225B2Sep 20, 2016
Low power hardware algorithms and architectures for spike sorting and detection
GINOSAR RAN6 citations75