Inventor
SEHGAL AKSHEY
US16 patents
⚠️ This page may combine multiple inventors who share the name “SEHGAL AKSHEY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
GLOBALFOUNDRIES INC
15 patentsUS10347528B1Jul 9, 2019
Interconnect formation process using wire trench etch prior to via etch, and related interconnect
GLOBALFOUNDRIES INC21 citations93
US9117822B1Aug 25, 2015
Methods and structures for back end of line integration
GLOBALFOUNDRIES INC16 citations91
US9576894B2Feb 21, 2017
Integrated circuits including organic interlayer dielectric layers and methods for fabricating the same
GLOBALFOUNDRIES INC9 citations83
US9105478B2Aug 11, 2015
Devices and methods of forming fins at tight fin pitches
GLOBALFOUNDRIES INC9 citations83
US9121890B2Sep 1, 2015
Planar metrology pad adjacent a set of fins of a fin field effect transistor device
GLOBALFOUNDRIES INC5 citations82
US8969932B2Mar 3, 2015
Methods of forming a finfet semiconductor device with undoped fins
GLOBALFOUNDRIES INC6 citations81
US10181420B2Jan 15, 2019
Devices with chamfer-less vias multi-patterning and methods for forming chamfer-less vias
GLOBALFOUNDRIES INC2 citations68
US9129905B2Sep 8, 2015
Planar metrology pad adjacent a set of fins of a fin field effect transistor device
GLOBALFOUNDRIES INC3 citations61
US10818557B2Oct 27, 2020
Integrated circuit structure to reduce soft-fail incidence and method of forming same
GLOBALFOUNDRIES INC1 citations60
US9105507B2Aug 11, 2015
Methods of forming a FinFET semiconductor device with undoped fins
GLOBALFOUNDRIES INC3 citations60
US10714380B2Jul 14, 2020
Method of forming smooth sidewall structures using spacer materials
GLOBALFOUNDRIES INC0 citations51
US10121711B2Nov 6, 2018
Planar metrology pad adjacent a set of fins of a fin field effect transistor device
GLOBALFOUNDRIES INC0 citations51
US9293363B2Mar 22, 2016
Methods and structures for back end of line integration
GLOBALFOUNDRIES INC0 citations51
US10134876B2Nov 20, 2018
FinFETs with strained channels and reduced on state resistance
GLOBALFOUNDRIES INC1 citations49
US9281249B2Mar 8, 2016
Decoupling measurement of layer thicknesses of a plurality of layers of a circuit structure
GLOBALFOUNDRIES INC0 citations40